At the end of 2026, the Advanced Performance Extensions, APX, will be in shipped processors by Intel. In 2027 by AMD.

Will FASM 1 get the extensions or only FASM 2?

Does this first APX include the upgrade to 32 registers?

Yes, there are no multiple versions of APX. So, the 32 registers are available in the first release. The normal 1-byte prefix for 64-bit assembly code will get a 2-byte prefix for APX. That will increase the code size, however, the new 3 operand instructions will compact the code.
For instance when you have a value in RCX and you want to bitshift right 4 times the value and put it in R18, you can do in APX:
SHR R18, RCX, 4
It will not touch the RCX register.
Intel has a simulator for APX.

APX is basically RISC-V/ARM for x86_64.

Funny. Maybe we'll get a RISC-V decoder front-end for AMD and INTEL µarchitectures (probably server/mobile at first)

Yep, maybe the time fasm pre-processor/CALM languages will get a RISC-V port is getting closer?

As I understand it, the development of FASM 1 is final, so APX will never be in it. FASM 2 is the place, but it does not have it at the moment.
So,
mov r16,0
will result in:
Error: symbol 'r16' is undefined or out of scope.

The topic should be hot. Has everybody gone to NASM?

@ground You have to understand fasm is not an assembler per se, but a set of languages to develop assemblers for most binary formats.

I assume that is meant to say fasmg?

I do not want to promise too much. I've been planning to get back to video streaming, and do a REX2 implementation live, but I simply could not find a good opportunity this year, especially since I didn't expect much attention.

And, considering that adding instructions into fasm2 is relatively easy, someone might beat me to it.