Shouldn't "movq r64,xmm" be legal?

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lazer1

Joined: 24 Jan 2006
Posts: 185

lazer1 18 Aug 2008, 17:55

[quote="Madis731"]The topic today is:
use64

Code:

        movq    xmm0,rdx
        movd    xmm0,edx
;        movq    rdx,xmm0
        db      66h,48h,0Fh,7Eh,0C2h
        movd    edx,xmm0

FASM refuses to assemble the commented line. Why?
/quote]

because there is no such instruction! Sad

Quote:

AMD volume 4, 128 bit media instructions, page 187:

movq xmm1, xmm2/mem64
movq xmm1/mem64, xmm2

are you SURE of your opcode??? or did you mean mmx eg
mm0 Surprised

the other movq instructions above ALSO DO NOT EXIST in the AMD docs!

you possibly meant "movd rax, xmm0" which fasm doesnt accept,

should be able to do that via the macros I gave by customising
the later macros. I plan to do that as I need the latter instruction

18 Aug 2008, 17:55

lazer1

Joined: 24 Jan 2006
Posts: 185

lazer1 18 Aug 2008, 18:33

revolution wrote:

lazer1 wrote:
if it CAN hold your hand it SHOULD
I don't agree, if we go down that path then we end up with something with so many restrictions that we will end up fighting the assembler just to get simple tasks done.

not true,

there just a few changes, mainly rationalising "mov" and "movzx"

and some changes to the way labels are dealt with.

the difference between something good and something bad is
usually marginal.

the changes I want are mov generalised to a few SSE instructions
and eg 64 bit "mov eax,ebx" renamed as "movzx rax,ebx"

18 Aug 2008, 18:33

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20413
Location: In your JS exploiting you and your system

revolution 18 Aug 2008, 18:37

lazer1 wrote:

there just a few changes, mainly rationalising "mov" and "movzx"

That is not hand-holding with the labels (which is what we were discussing) that is syntax adjustment.

18 Aug 2008, 18:37

lazer1

Joined: 24 Jan 2006
Posts: 185

lazer1 18 Aug 2008, 18:39

here is the improved macro to deal with "movd xmm,reg64" AND
"movd reg64,xmm" it wont deal with any mem64 instructions.

"movd reg64,xmm" I think deals with the original bug,

the nonexisting instructions that fasm is processing need to be
done by some other macros that intercept the bugs

I have compiled but not run these macros, so they could contain bugs:

Code:

;============= "movd xmm,reg64" and "movd reg64,xmm" via fasm macros: =================


registers64old equ rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi
registers64new   equ   r8,   r9,   r10,   r11,   r12,   r13,   r14,   r15
registers64xmmlo equ xmm0, xmm1, xmm2,  xmm3,  xmm4,  xmm5,  xmm6,  xmm7
registers64xmmhi equ xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15


macro mod_rm mod_*, reg*
      {
      if reg in <al,ax,eax,rax,mm0,xmm0,r8,xmm8>
    
            db (mod_ shl 3) or 0
                
    else if reg in <cl,cx,ecx,rcx,mm1,xmm1,r9,xmm9>
       
            db (mod_ shl 3) or 1
                
    else if reg in <dl,dx,edx,rdx,mm2,xmm2,r10,xmm10>
             
            db (mod_ shl 3) or 2
                
    else if reg in <bl,bx,ebx,rbx,mm3,xmm3,r11,xmm11>
             
            db (mod_ shl 3) or 3
                
    else if reg in <ah,spl,sp,esp,rbx,mm4,xmm4,r12,xmm12>
         
            db (mod_ shl 3) or 4
                
    else if reg in <ch,bpl,bp,ebp,rbp,mm5,xmm5,r13,xmm13>
         
            db (mod_ shl 3) or 5
                
    else if reg in <dh,si,sil,esi,rsi,mm6,xmm6,r14,xmm14>
         
            db (mod_ shl 3) or 6
                
    else if reg in <bh,di,dil,edi,rdi,mm7,xmm7,r15,xmm15>
         
            db (mod_ shl 3) or 7
                
    else
                display 'BUG: unrecognised register'
  end if
      }

macro mod_reg_rm mod_*, reg*, rm*
     {
      if reg in <al,ax,eax,rax,mm0,xmm0,r8,xmm8>
    
            mod_rm (mod_ shl 3) or 0, rm
                
    else if reg in <cl,cx,ecx,rcx,mm1,xmm1,r9,xmm9>
       
            mod_rm (mod_ shl 3) or 1, rm
                
    else if reg in <dl,dx,edx,rdx,mm2,xmm2,r10,xmm10>
             
            mod_rm (mod_ shl 3) or 2, rm
                
    else if reg in <bl,bx,ebx,rbx,mm3,xmm3,r11,xmm11>
             
            mod_rm (mod_ shl 3) or 3, rm
                
    else if reg in <ah,spl,sp,esp,rbx,mm4,xmm4,r12,xmm12>
         
            mod_rm (mod_ shl 3) or 4, rm
                
    else if reg in <ch,bpl,bp,ebp,rbp,mm5,xmm5,r13,xmm13>
         
            mod_rm (mod_ shl 3) or 5, rm
                
    else if reg in <dh,si,sil,esi,rsi,mm6,xmm6,r14,xmm14>
         
            mod_rm (mod_ shl 3) or 6, rm
                
    else if reg in <bh,di,dil,edi,rdi,mm7,xmm7,r15,xmm15>
         
            mod_rm (mod_ shl 3) or 7, rm
                
    else
                display 'BUG: unrecognised register'
  end if
      }

macro movd_br rexr*, rexb*, xmm*, reg*
        {
      db 66h, 40h or 8h or (rexr shl 2) or rexb, 0fh, 6eh
 
    mod_reg_rm 11b, xmm, reg
    }

macro movd_b rexb*, xmm*, reg*
        {
      if xmm in <registers64xmmlo>
          movd_br 0, rexb, xmm, reg
   else if xmm in <registers64xmmhi>
             movd_br 1, rexb, xmm, reg
   else
                movd xmm, reg
       end if
      }

macro movd xmm*, reg*
 {
      if reg in <registers64old> ; rex.b==0
         movd_b 0, xmm, reg 
 else if reg in <registers64new> ; rex.b==1
            movd_b 1, xmm, reg
  else
                movd xmm, reg 
      end if
      }


macro movd1_br rexr*, rexb*, reg*, xmm*
   {
      db 66h, 40h or 8h or (rexr shl 2) or rexb, 0fh, 7eh
 
    mod_reg_rm 11b, reg, xmm
    }


macro movd1_b rexb*, reg*, xmm*
   {
      if xmm in <registers64xmmlo>
          movd1_br 0, rexb, reg, xmm
  else if xmm in <registers64xmmhi>
             movd1_br 1, rexb, reg, xmm
  else
                movd reg, xmm ; ignore
      end if
      }


macro movd reg*,xmm*
      {
      if reg in <registers64old> ; rex.b==0
         movd1_b 0, reg, xmm 
        else if reg in <registers64new> ; rex.b==1
            movd1_b 1, reg, xmm
 else
                movd reg, xmm ; ignore
      end if
      }


;===================================================================

18 Aug 2008, 18:39

lazer1

Joined: 24 Jan 2006
Posts: 185

lazer1 18 Aug 2008, 18:48

revolution wrote:

lazer1 wrote:
there just a few changes, mainly rationalising "mov" and "movzx"
That is not hand-holding with the labels (which is what we were discussing) that is syntax adjustment.

I see you have done 2677 posts!

its pointless arguing about this, what I am saying is conformant

with the mainstream of compilers and languages.

have you ever looked at the number of optional warnings gcc has?

eg if you have Linux try:

man gcc

it literally has HUNDREDS of optional warnings, and ideally
you want ALL via "gcc -Wall" each warning CAN prevent a class
of bugs, although some warnings are too much work to remove
and you switch off the warning via a command line option.

you are not arguing with me but with the mainstream,
you can do things however you want, there are no rules:
anything goes. the mainstream isnt always right, but you need good reason
to flout the mainstream.

anyway to the original thread I have got the instructions I wanted
via macros.

18 Aug 2008, 18:48

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20413
Location: In your JS exploiting you and your system

revolution 18 Aug 2008, 19:09

By all means adjust the syntax to whatever you want. I am no great fan of Intel syntax anyway (although it is better than AT&T IMO).

But the point to me is that the de-facto standard is Intel syntax which everyone understands. You suggest changing fasm syntax to be more orthogonal/logical (a noble endeavour), but with that you also create incompatibility.

I do not think it is fair to call the fasm syntax a bug, it simply follows Intel syntax (for the most part), this is by design, not by mistake.

18 Aug 2008, 19:09

lazer1

Joined: 24 Jan 2006
Posts: 185

lazer1 18 Aug 2008, 20:31

revolution wrote:

By all means adjust the syntax to whatever you want. I am no great fan of Intel syntax anyway (although it is better than AT&T IMO).

I'll probably do it via interception macros as a header file.

Quote:

But the point to me is that the de-facto standard is Intel syntax which everyone understands. You suggest changing fasm syntax to be more orthogonal/logical (a noble endeavour), but with that you also create incompatibility.

I do not think it is fair to call the fasm syntax a bug, it simply follows Intel syntax (for the most part), this is by design, not by mistake.

are you saying Intel allows "movq rax, xmm0" ?

that must be a conflict between Intel and AMD then.

this is where replacing all by a generalised "mov" will be
useful. you can then just use:

"mov rax, xmm0" and leave it to the macro eg:

Quote:

macro mov dest, src
{
if dest in <registers64>
if src in <registersxmm>
movq dest, src ; route the instruction to the appropriate instruction
else
?????
end if
else
????
end if
}
}

I dont like having a dozen opcodes for what are just mov and movzx

18 Aug 2008, 20:31

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20413
Location: In your JS exploiting you and your system

revolution 18 Aug 2008, 20:50

I seem to be having trouble making myself understood, sorry about that, I'll try harder. I'm not saying that fasm has no bugs, there are probably some bugs here and there, but the syntax itself cannot be called a bug. I thought you wanted to make movzx r64,r32 and disallow mov r32,r32 in use64 mode. That is a syntax change which deviates from the Intel/AMD syntax.

By all means point out bugs so that we can all benefit in the future with a better fasm. I encourage it, and please continue to do it.

18 Aug 2008, 20:50

lazer1

Joined: 24 Jan 2006
Posts: 185

lazer1 19 Aug 2008, 13:43

here is a debugged version of the macros I gave.

I have tested these out by setting 2 reg64's to different values,

then moving the one reg64 to either an mmx or xmm register,

and then moving that to the other reg64 and seeing if the

other reg64 now has the value from the first reg64. the macros

now satisfy these tests, the versions I gave above dont!

these macros are for moving reg64's to and from mmx and

xmm registers with zero extension for xmm's.

(they could still contain bugs!)

I have renamed various things to more meaningful names.

Quote:

;=========================================
; ;
; fasm macros for AMD: ;
; ;
; "movd xmm,reg64" ;
; "movd reg64,xmm" ;
; "movd mmx,reg64" ;
; "movd reg64,mmx" ;
; ;
;=========================================

registers_mmx equ mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7
registers_xmm_old equ xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
registers_xmm_new equ xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
registers64new equ r8, r9, r10, r11, r12, r13, r14, r15
registers64old equ rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi

macro mod_rm mod_*, reg*
{
if reg in <al,ax,eax,rax,mm0,xmm0,r8,xmm8>

db (mod_ shl 3) + 0

else if reg in <cl,cx,ecx,rcx,mm1,xmm1,r9,xmm9>

db (mod_ shl 3) + 1

else if reg in <dl,dx,edx,rdx,mm2,xmm2,r10,xmm10>

db (mod_ shl 3) + 2

else if reg in <bl,bx,ebx,rbx,mm3,xmm3,r11,xmm11>

db (mod_ shl 3) + 3

else if reg in <ah,spl,sp,esp,rbx,mm4,xmm4,r12,xmm12>

db (mod_ shl 3) + 4

else if reg in <ch,bpl,bp,ebp,rbp,mm5,xmm5,r13,xmm13>

db (mod_ shl 3) + 5

else if reg in <dh,si,sil,esi,rsi,mm6,xmm6,r14,xmm14>

db (mod_ shl 3) + 6

else if reg in <bh,di,dil,edi,rdi,mm7,xmm7,r15,xmm15>

db (mod_ shl 3) + 7

else
display 'BUG: unrecognised register'
end if
}

macro mod_reg_rm mod_*, reg*, rm*
{
if reg in <al,ax,eax,rax,mm0,xmm0,r8,xmm8>

mod_rm ((mod_ shl 3) + 0), rm

else if reg in <cl,cx,ecx,rcx,mm1,xmm1,r9,xmm9>

mod_rm ((mod_ shl 3) + 1), rm

else if reg in <dl,dx,edx,rdx,mm2,xmm2,r10,xmm10>

mod_rm ((mod_ shl 3) + 2), rm

else if reg in <bl,bx,ebx,rbx,mm3,xmm3,r11,xmm11>

mod_rm ((mod_ shl 3) + 3), rm

else if reg in <ah,spl,sp,esp,rbx,mm4,xmm4,r12,xmm12>

mod_rm ((mod_ shl 3) + 4), rm

else if reg in <ch,bpl,bp,ebp,rbp,mm5,xmm5,r13,xmm13>

mod_rm ((mod_ shl 3) + 5), rm

else if reg in <dh,si,sil,esi,rsi,mm6,xmm6,r14,xmm14>

mod_rm ((mod_ shl 3) + 6), rm

else if reg in <bh,di,dil,edi,rdi,mm7,xmm7,r15,xmm15>

mod_rm ((mod_ shl 3) + 7), rm

else
display 'BUG: unrecognised register'
end if
}

macro movd_xmm_br rexr*, rexb*, xmm*, reg*
{
db 66h, 40h + 8h + (rexr shl 2) + rexb, 0fh, 6eh

mod_reg_rm 11b, xmm, reg
}

macro movd_mmx_br rexr*, rexb*, mmx*, reg*
{
db 40h + 8h + (rexr shl 2) + rexb, 0fh, 6eh

mod_reg_rm 11b, mmx, reg
}

macro movd_xmm_b rexb*, xmm*, reg*
{
if xmm in <registers_xmm_old>
movd_xmm_br 0, rexb, xmm, reg
else if xmm in <registers_xmm_new>
movd_xmm_br 1, rexb, xmm, reg
else if xmm in <registers_mmx>

movd_mmx_br 0, rexb, xmm, reg

else
movd xmm, reg
end if
}

macro movd xmm*, reg*
{
if reg in <registers64old> ; rex.b==0
movd_xmm_b 0, xmm, reg
else if reg in <registers64new> ; rex.b==1
movd_xmm_b 1, xmm, reg
else
movd xmm, reg
end if
}

macro movd_reg_br rexr*, rexb*, reg*, xmm*
{
db 66h, 40h + 8h + (rexr shl 2) + rexb, 0fh, 7eh

mod_reg_rm 11b, xmm, reg
}

macro movd_reg_mmx_br rexr*, rexb*, reg*, mmx*
{
db 40h + 8h + (rexr shl 2) + rexb, 0fh, 7eh

mod_reg_rm 11b, mmx, reg
}

macro movd_reg_b rexb*, reg*, xmm*
{
if xmm in <registers_xmm_old>
movd_reg_br 0, rexb, reg, xmm
else if xmm in <registers_xmm_new>
movd_reg_br 1, rexb, reg, xmm
else if xmm in <registers_mmx>
movd_reg_mmx_br 0, rexb, reg, xmm
else
movd reg, xmm ; ignore
end if
}

macro movd reg*,xmm*
{
if reg in <registers64old> ; rex.b==0
movd_reg_b 0, reg, xmm
else if reg in <registers64new> ; rex.b==1
movd_reg_b 1, reg, xmm
else
movd reg, xmm ; ignore
end if
}

;===================================================================

19 Aug 2008, 13:43

Azu

Joined: 16 Dec 2008
Posts: 1159

Azu 04 Nov 2009, 19:54

Madis731 wrote:

It won't be changed! The only thing needed is this bugfix, but we won't declare another syntax here. What you can do it use macros to make your life simpler, but I can tell you this: if you've coded in SSE for a few days you have a real "epiphany" Wow, this is so logical.

I can give you an example which is illogical:
Code:
use32
 mov ax,bx   ;okay 16-bit move
 mov eax,ebx ;okay 32-bit move
use64
 mov eax,ebx ;upper 32 bits are cleared
 mov rax,rbx ;okay 64-bit move
;Should is be more like this?
 movzx eax,ebx ;This is what it exactly means 
    
So SSE is pretty logical compared to this.

No it should be like this
movzx rax,ebx

Moving something to eax should only change eax.

_________________

04 Nov 2009, 19:54

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