Hi everyone,
I’ve been lurking here for a while and finally decided to reach out. I recently revisited an older project involving an old-school workstation build powered by a Xeon Quad Core (specifically the 2.83GHz variant with a 1333MHz FSB) https://serverorbit.com/cpus-and-processors/xeon-quad-core/2-83ghz-1333mhz-fsb. It’s been an interesting experiment in constraints; coming from the world of modern, high-level frameworks, actually writing code that respects the limitations of that specific bus speed and cache structure is quite a humbling experience.
What really struck me while digging into the manual was how much performance is left on the table if you don't account for the FSB bottleneck in your assembly routines. I'm finding that for certain tight loops, the way I handle memory access has a massive impact on efficiency, far more than on modern platforms where the CPU just masks poor code with raw speed.
Since I am using FASM for this, I was curious if any of you still spend time optimizing for these older architectures, or if most of you have moved entirely to x86-64/AVX-heavy targets. Do you find that the "old-school" approach of hand-optimizing memory alignment and instruction pipelining for specific FSB speeds is still a relevant skill set today, or is it mostly just a fun exercise in nostalgia? I’d love to hear how you handle latency-sensitive tasks on these older quad-core workhorses compared to newer chips.[url][/url]

Anyone needing good performance today would be foolish to choose something so old unless there is no other option. So this kind of task is definitely in the "fun" category only.

I code for x64 and I also align memory and code and try to implement smaller loops.
I also use default branch prediction as per x86 coding manuals.
In my opinion, optimization still needed even if code is done for newer tech.