adding a carry

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FoXx

Joined: 25 Feb 2025
Posts: 21

FoXx 06 Oct 2025, 10:25

Code:

SCALE_SIZE = 1024
VOLUME = 100000

struct FLOAT64

        high    dd ?
        low     dd ?
        under   dd ?
ends


        mov ESI, [lpSinusScale]
        mov EBX, VOLUME
        mov ECX, SCALE_SIZE

        mov EDI, val
        xor EAX, EAX
        stosd
        stosd
        stosd

.integrator:
        lodsd
        mul EBX
        add [val.under],EAX
        adс [val.low],  EDX
        adc [val.high], 0

        loop .integrator

I'm trying to integrate a 64-bit value into a 32-bit processor. Precise calculations are required. A solution already exists. I'm not very familiar with x86 instructions.
Is there a way to add a carry without adding a third value?

Code:

        add [val.under],EAX
        adс [val.low],  EDX
        adz [val.high]          ;       similar

Last edited by FoXx on 06 Oct 2025, 13:37; edited 1 time in total

06 Oct 2025, 10:25

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20753
Location: In your JS exploiting you and your system

revolution 06 Oct 2025, 11:21

Ideally the code should propagate the carry through all variables.

Code:

        add [val.under],EAX
        adc [val.low],  EDX ; use ADC here
        adc [val.high], 0   ; use ADC here also

06 Oct 2025, 11:21

FoXx

Joined: 25 Feb 2025
Posts: 21

FoXx 06 Oct 2025, 13:37

You're right. It's figurative code. The order of the operators is wrong. I've fixed it.

Is there such an instruction for the х86 processor?

06 Oct 2025, 13:37

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20753
Location: In your JS exploiting you and your system

revolution 06 Oct 2025, 21:12

There is no opcode ADZ.

06 Oct 2025, 21:12

FoXx

Joined: 25 Feb 2025
Posts: 21

FoXx 21 Oct 2025, 10:53

This command won't take many CISC architecture cycles. It would be very useful. You can contact Intel Smile

revolution, thank you for the analysis.

21 Oct 2025, 10:53

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20753
Location: In your JS exploiting you and your system

revolution 21 Oct 2025, 10:58

FoXx wrote:

This command won't take many CISC architecture cycles. It would be very useful. You can contact Intel

That might be correct about the execution cycles, but new instructions do take up encoding space in the opcode tables, so they do have a cost. They can make other opcodes, that might or might not be more useful, unavailable, or use more bytes to encode.

Everything is trade-off.

21 Oct 2025, 10:58

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