flat assembler - FASMARM v1.44 - Cross assembler for ARM CPUs

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revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20656
Location: In your JS exploiting you and your system

revolution 05 Sep 2023, 14:56

Tomasz Grysztar wrote:

The armpe64.exe from the package did not work for me on Windows 11 on ARM. I got it working by adding fixups:
Code:
section '.reloc' fixups data readable discardable

  if $=$$
    dw 0,8              ; if there are no fixups, generate dummy entry
  end if    
Now, with this addition, it even works with F9 from FASMWARM.

Thanks for the report.

I will update the file at the next update with a some other fixes and additions.

05 Sep 2023, 14:56

rrq

Joined: 17 May 2021
Posts: 6

rrq 03 Jun 2025, 12:36

@revolution if you take patches for FASMARM; I added a couple of system registers that seemed to be missing:
ttbr1_el2, vpidr_el2, vttbr_el2, id_aa64mmfr2_el1, id_aa64mmfr3_el1, id_aa64mmfr4_el1

(in source/armtable.inc)

03 Jun 2025, 12:36

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20656
Location: In your JS exploiting you and your system

revolution 03 Jun 2025, 12:55

I am always open to suggestions and additions. If you wish to provide some patches I can accept and incorporate them as appropriate. But I can't guarantee when I am next able to make changes.

There are many new registers and instructions that ARM have added since the most recent fasmarm update. So it is no surprise that the new stuff is missing.

03 Jun 2025, 12:55

rrq

Joined: 17 May 2021
Posts: 6

rrq 03 Jun 2025, 13:51

Yes, I needed these... added to v 1.44 by this patch

Code:

diff --git a/source/armtable.inc b/source/armtable.inc
index b22ac3e..d4dbb51 100644
--- a/source/armtable.inc
+++ b/source/armtable.inc
@@ -1686,6 +1686,7 @@ symbols_9:
        symbol_maker    'ttbr0_el2',sys_msr+(sys_encode_ttbr0_el2-sys_encode_table_msr) shr 1
        symbol_maker    'ttbr0_el3',sys_msr+(sys_encode_ttbr0_el3-sys_encode_table_msr) shr 1
        symbol_maker    'ttbr1_el1',sys_msr+(sys_encode_ttbr1_el1-sys_encode_table_msr) shr 1
+       symbol_maker    'ttbr1_el2',sys_msr+(sys_encode_ttbr1_el2-sys_encode_table_msr) shr 1
        symbol_maker    'vmalle1is',sys_tlbi+(sys_encode_vmalle1is-sys_encode_table_tlbi) shr 1
        symbol_maker    'vpidr_el2',sys_msr+(sys_encode_vpidr_el2-sys_encode_table_msr) shr 1
        symbol_maker    'vttbr_el2',sys_msr+(sys_encode_vttbr_el2-sys_encode_table_msr) shr 1
@@ -2027,6 +2028,9 @@ symbols_16:
        symbol_maker    'id_aa64isar1_el1',sys_msr+(sys_encode_id_aa64isar1_el1-sys_encode_table_msr) shr 1
        symbol_maker    'id_aa64mmfr0_el1',sys_msr+(sys_encode_id_aa64mmfr0_el1-sys_encode_table_msr) shr 1
        symbol_maker    'id_aa64mmfr1_el1',sys_msr+(sys_encode_id_aa64mmfr1_el1-sys_encode_table_msr) shr 1
+       symbol_maker    'id_aa64mmfr2_el1',sys_msr+(sys_encode_id_aa64mmfr2_el1-sys_encode_table_msr) shr 1
+       symbol_maker    'id_aa64mmfr3_el1',sys_msr+(sys_encode_id_aa64mmfr3_el1-sys_encode_table_msr) shr 1
+       symbol_maker    'id_aa64mmfr4_el1',sys_msr+(sys_encode_id_aa64mmfr4_el1-sys_encode_table_msr) shr 1
 symbols_17:
        symbol_maker    'copro_simd_crypto',copro_sel+COPRO_CAPABILITY_SIMD_CRYPTO
        symbol_maker    'dbgauthstatus_el1',sys_msr+(sys_encode_dbgauthstatus_el1-sys_encode_table_msr) shr 1
@@ -2323,6 +2327,9 @@ sys_encode_table_msr:
        sys_encode_id_aa64isar1_el1:    dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00110b shl 3 + 0001b
        sys_encode_id_aa64mmfr0_el1:    dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00111b shl 3 + 0000b
        sys_encode_id_aa64mmfr1_el1:    dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00111b shl 3 + 0001b
+       sys_encode_id_aa64mmfr2_el1:    dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00111b shl 3 + 0010b
+       sys_encode_id_aa64mmfr3_el1:    dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00111b shl 3 + 0011b
+       sys_encode_id_aa64mmfr4_el1:    dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00111b shl 3 + 0100b
        sys_encode_id_aa64pfr0_el1:     dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00100b shl 3 + 0000b
        sys_encode_id_aa64pfr1_el1:     dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00100b shl 3 + 0001b
        sys_encode_id_afr0_el1:         dw      011b shl 14 + 0000b shl 11 + 00000b shl 7 + 00001b shl 3 + 0011b
@@ -2477,6 +2484,7 @@ sys_encode_table_msr:
        sys_encode_ttbr0_el2:           dw      011b shl 14 + 0100b shl 11 + 00010b shl 7 + 00000b shl 3 + 0000b
        sys_encode_ttbr0_el3:           dw      011b shl 14 + 0110b shl 11 + 00010b shl 7 + 00000b shl 3 + 0000b
        sys_encode_ttbr1_el1:           dw      011b shl 14 + 0000b shl 11 + 00010b shl 7 + 00000b shl 3 + 0001b
+       sys_encode_ttbr1_el2:           dw      011b shl 14 + 0100b shl 11 + 00010b shl 7 + 00000b shl 3 + 0001b
        sys_encode_vbar_el1:            dw      011b shl 14 + 0000b shl 11 + 01100b shl 7 + 00000b shl 3 + 0000b
        sys_encode_vbar_el2:            dw      011b shl 14 + 0100b shl 11 + 01100b shl 7 + 00000b shl 3 + 0000b
        sys_encode_vbar_el3:            dw      011b shl 14 + 0110b shl 11 + 01100b shl 7 + 00000b shl 3 + 0000b

EDIT: Corrected as per below (thanks).

Last edited by rrq on 03 Jun 2025, 14:23; edited 1 time in total

03 Jun 2025, 13:51

rrq

Joined: 17 May 2021
Posts: 6

rrq 03 Jun 2025, 13:54

hmm now I realize vpidr_el2 and vttbr_el2 got commented out after adding... I don't remember why.

03 Jun 2025, 13:54

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20656
Location: In your JS exploiting you and your system

revolution 03 Jun 2025, 13:58

The patch puts vmalle1is out of alphabetic order. The symbols need to be in proper alphabetic order for the binary search to work correctly.

03 Jun 2025, 13:58

rrq

Joined: 17 May 2021
Posts: 6

rrq 03 Jun 2025, 14:25

Thanks. I corrected the patch.. that might explain my confusion with vpidr_el2 and vttbr_el2...
all too many system register for a mortal Smile

03 Jun 2025, 14:25

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