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flat assembler > Compiler Internals > fasm 1.71.57 - x64 wrong opcode generated

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not.rash



Joined: 24 Oct 2016
Posts: 1
fasm 1.71.57 - x64 wrong opcode generated
mov esi,[rsi+rbp+8]
8B 74 2E 08 | mov esi,dword ptr ds:[rsi+rbp+8] < OK
mov esi,[rbp+rsi+8]
8B 74 2E 08 | mov esi,dword ptr ds:[rsi+rbp+8] < bug
8B 74 35 08 | mov esi,dword ptr ss:[rbp+rsi+8] < should be

add [rcx+rbp],rbp
48 01 2C 29 | add qword ptr ds:[rcx+rbp],rbp < OK
add [rbp+rcx],rbp
48 01 2C 29 | add qword ptr ds:[rcx+rbp],rbp < bug
48 01 6C 0D 00 | add qword ptr ss:[rbp+rcx],rbp < should be
Post 24 Oct 2016, 16:41
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6386
Location: Kraków, Poland
In long mode there are no DS/SS segments (segment prefixes also would not have any effect). The generated instructions are completely equivalent.
Post 24 Oct 2016, 17:08
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 14848
Location: Lost in translation

Tomasz Grysztar wrote:
The generated instructions are completely equivalent.

Equivalent, yes, but not the same. While I agree with the generalisation of the register assignments, I think it is important to have the users be aware that this can happen. If someone wanted to generate code on-the-fly (i.e. SMC) and expects the second register to always be encoded the same then they will get problems.

So for the OP, if you need it like this then it would be best to manually re-encode the required instruction after assembly. You can still use a template instruction as the base and then manually encode the two registers as required for the purpose.
Post 25 Oct 2016, 06:51
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6386
Location: Kraków, Poland

revolution wrote:
Equivalent, yes, but not the same. While I agree with the generalisation of the register assignments, I think it is important to have the users be aware that this can happen. If someone wanted to generate code on-the-fly (i.e. SMC) and expects the second register to always be encoded the same then they will get problems.

I already stated many times that fasm's instruction syntax focuses on the function of the instruction and the assembler is free to choose any form it wishes while it tries to optimize them for size. If you had no +8 displacement there, the rearrangement of registers would actually generate shorter instruction opcode and this is why fasm does rearrange them.
Post 25 Oct 2016, 08:11
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 14848
Location: Lost in translation

Tomasz Grysztar wrote:
I already stated many times that fasm's instruction syntax focuses on the function of the instruction and the assembler is free to choose any form it wishes while it tries to optimize them for size.

Yes, this I agree with. If someone wants a specific encoding then they just have to be aware of what is happening underneath.
Post 25 Oct 2016, 08:16
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6386
Location: Kraków, Poland
Perhaps some general principles like this one should be better emphasized in the manual. That's another of the many improvements fasm's old manual could use...
Post 25 Oct 2016, 08:19
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