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flat assembler > Projects and Ideas > Power Machine Universal Assembler

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m3ntal



Joined: 08 Dec 2013
Posts: 296
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Quote:
* Universal Assembler. Both Native/Translation and/or Virtual/Emulation
* Super efficient. Easy encoding. Many instructions can be encoded in 1-4 bytes with 16 registers, 2-3 operands.
* Optimized for Intel, ARM and similar CPUs. Smarter ISA
* 16 registers, 12 general, IP accessible: LET IP=(R1+(R2*R3)+R4)
* 16/32 addressing modes: Multiply, shift, add, arrays and structure access, pointers
* IF/ELSE/END expressions to construct LOOP N/WHILE C. Note: IF is a native instruction on some CPUs. Example: IF-THEN blocks in ARM Thumb mode.
* IF AND/OR conjunctions
* Easy executables. Optional debugging information. Exceptions, Data/Code Begin, Size. No unidentified bytes or confusion about what's data or code.
* Runtime error checking. Error: "Divide by zero", "Null pointer: Address: X. IP: X", "Attempt to execute data. Address: IP=X", "Array[I*W] index invalid. Address: X. Index: X. Size: X", "Stack overflow. Address: X. SP=X", "Stack imbalanced after return. Function: X. SP=X".
* Strict portable "define data" sizes: byte/d1, d2, d4. No vague "x/words" anymore. A "word" is supposed to be the width of data/address bus and that's true on ARM, word=32, dword=64, but for some reason, Intel32 word still=16BIT
* May create emulator in Javascript to run on Android device (MiniX 5/7 is good with HDMI). May create standalone in C4Droid.

POWER MACHINE ARCHITECTURE (UPDATED)

ADDRESSING MODES

Image

POWER SYSTEM INTERRUPTS (PSEUDO IDEAS)
Code:
#1: MAIN 0. Main.Initialize() 1. Main.Exit() 2. Main.Set.Event('Name',FP) 3. Main.Set.Error(N,'Reason',FP) 4. Main.Error(N) 5. Main.Fatal(N) 6. Main.Get.CPU(T,'Name,Speed,X') 7. Main.Get.Memory(T,'Speed,Used,Remain,X') 8. Main.Get.Slash() 9. Main.Get.Drives(T='CDE') 10. Main.Get.Drive.Available('C') 11. Main.Get.Drive.Used('C') 12. Main.Get.Screen('W,H,BPP') 13. Main.Etc()... #2: MEMORY 0. Memory.Allocate(N) 1. Memory.Reallocate(P,N) 2. Memory.Destroy(P) 3. Memory.Set(P,V,N) 4. Memory.Copy(A,B,N) 5. Memory.Zero.Index(A,I,S,N) ; A[+I*S]=0s,S 6. Memory.Get.Index(P,A,I,S,N) ; P=A[+I*S],S 7. Memory.Set.Index(P,A,I,S,N) ; A[+I*S]=P,S 8. Memory.Expand.Index(A,I,S) ; *A[+I*S]++ 9. Memory.Reduce.Index(A,I,S) ; *A[+I*S]-- ; P=Pointer, A=Raw array address (void *A), ; I=Index, S=Size of Index, N=# Indices ; available for 'Error: Array[?] Exception'. ; To insert Index[I], Expand(A[+I*S]) ; then Set(A[+I*S]) #3: TIME 0. Time.Mode('Name') 1. Time.Get('Name') 2. Time.Set('Name',N) 3. Time.Get.Count() 4. Time.Get.Cycles() 5. Time.Delay(MS) 6. Time.Set.Timer(FP,MS) #4: FILE 0. File.Get(P) 1. File.Set(P) 2. File.Mode(X) 3. File.Open(Name) 4. File.Create(Name) 5. File.Close() 6. File.Get.Size() 7. File.Seek(R,N) 8. File.Read(P,N) 9. File.Write(P,N) 10. File.Load(Name) 11. File.Save(Name,P,N) 12. File.Get.Drive() 13. File.Set.Drive(C) 14. File.Get.Name(P) 15. File.Get.Directory(P) 16. File.Set.Directory(P) 17. File.Up.Directory() 18. File.Copy(Old,New) 19. File.Move(Old,New) 20. File.Rename(Old,New) 21. File.Delete(Name) 22. File.Find(Key) 23. File.Find.Next() 24. File.Find.End() 25. File.Get.Create.Time(T,'TIME,DATE') 26. File.Set.Create.Time(T,'TIME,DATE') 27. File.Get.Access.Time(T,'TIME,DATE') 28. File.Set.Access.Time(T,'TIME,DATE') 29. File.Get.Modify.Time(T,'TIME,DATE') 30. File.Set.Modify.Time(T,'TIME,DATE') #5: DRAW 0. Set.Screen(P,X,Y,W,H,BPP) 1. Get.XY(X,Y) 2. Clear.Screen(C) 3. Draw.Screen() 4. Show.Screen() 5. Render(X,Y,W,H) 6. Render.Box(B) 7. Draw.Pixel(X,Y,C) 8. Draw.Line.H(X,Y,W,C) 9. Draw.Line.V(X,Y,H,C) 10. Draw.Box(X,Y,W,H,C) 11. Draw.Box.B(B,C) 12. Draw.Fade(X,Y,W,H,A,B) 13. Draw.Shade(X,Y,W,H,A,B) 14. Draw.Scanline(P,X,Y,W) 15. Draw.Scanline.X(TYPE,P,X,Y,N,A,B) 16. Draw.Bitmap(P,X,Y,W,H) 17. Draw.Bitmap.X(TYPE,P,X,Y,W,H,A,B) #6. BOX 0. Box.Set(B,X,Y,W,H) 1. Box.Move(B,X,Y) 2. Box.Size(B,W,H) 3. Box.Nudge(B,X,Y) 4. Box.Align(B,C,A) 5. Box.Align.In(B,C,A,X,Y) #7. COLOR 0. RGB(R,G,B) 1. RGB.X(TYPE,R,G,B) 2. Get.RGB(&R,&G,&B) 3. Get.RGB.X(TYPE,&R,&G,&B) 4. Alpha(A,B,N) 5. Colorize('RGB',N) 6. Grayscale(C) 7. Lightness(C,N) #8. IMAGE 0. Image.Create(P) Image.Destroy(P) Image.Get(P) Image.Set(P) Image.Move(X,Y) Image.Size(W,H) Image.Draw() Image.Rotate(X) Image.Etc() #9. FONT 0. Font.Create(P) Font.Destroy(P) Set.Font(F) Set.Font.Color(C) Draw.C(C) Draw.Text() Make.Text.Box(T,B) Font.Etc() #10. SOUND 0. Sound.Create(P) 1. Sound.Destroy(P) 2. Sound.Load('Name') 3. Music.Load('Name') 4. Sound.Play() 5. Sound.Stop() 6. Sound.Rewind() 7. Sound.Position(N) 8. Sound.Volume(N) 9. Sound.Surround.3(A,B,C) 9. Sound.Surround.5(A,B,C,D,E) #11: DEVICE 0. Get.Key(X) 1. Get.Keys(P,N) 2. Get.Mouse.XY() 3. Get.Mouse.Buttons() 4. If.Key(K) 5. If.Select(B) 6. If.Click(B) 7. If.Gamepad(X) 8. Vibrate.Gamepad(N) #12. CONSOLE 0. Console.Create(X,Y,W,H,MAX) 1. Console.Set.Color(C) 2. Console.Set.Font(Style) 3. Console.Set.Font.Color(C) 4. Console.Wait.Key() 5. Console.Read.C(C) 6. Console.Read.T(T) 7. Console.Read.N(N) 8. Console.Write.C(C) 9. Console.Write.T(T) 10. Console.Write.N(N) 11. Console.Etc() #13. WINDOW 0. Window.Create() 1. Window.Etc #14. NETWORK 0. Socket.Create() 1. Socket.Etc() #15. MAIL Mail.Send(X) Mail.Etc(X) #16. GPS (ABAKIS>INCLUDE>ARM>MOBILE>GPS.INC) 0. GPS.Create() GPS.Etc() #17. PHONE 0. Phone.Call(X) Phone.Answer(X) Phone.Etc... ... NO MORE TIME!

WHAT IS "ASSEMBLER"?
Quote:
"Assembler"; Any language that has the capability to write machine code directly (db/dd/dx) or a LL language that translates directly to machine code with little or no layers of HL abstraction. This definition is from one who actually makes assemblers and compilers for multiple CPUs. Programmers who only use Intel MASM32 style and have never made an assembler or compiler may disagree.
Code:
; ___ ___ _ _____ ____ ; / _ \/ _ \ |/|/ / -_) __/ ; / .__/\___/__,__/\__/_/ ; /_/_ _ ___ _____/ / (_)__ ___ ; / ' \/ _ `/ __/ _ \/ / _ \/ -_) ; /_/_/_/\_,_/\__/_//_/_/_//_/\__/ ; Power-Machine Universal Assembler. ; Utilizes Intel+ARM+M68K+Similar. ; Efficient ISA does the maximum in ; minimal space. Random preview: if r1<=12345678h and r1>r2+(r3*r4)+r5 let r0=12ABCDEFh, r1=r2+(r3<<r4)+12345678h let4 *r7++=*(ip+(r8*r9)+r10) pushm r0-r1,r3-r4,r6-r7,r9-r11,r13-r14 add r5, ip+1234CAFEh, 256*MB idiv r1, r2, r3, r4 mul r3, r7+(r8>>r9)+r10, r12 sub r7, &sp[r10*r11]->r12, 7BABE12h popm r1-r2,r4-r5,r7-r8,r10-r12,r14-ip end

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Last edited by m3ntal on 03 Feb 2015, 14:49; edited 1 time in total
Post 31 Jan 2015, 16:37
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m3ntal



Joined: 08 Dec 2013
Posts: 296
ULTIMATE ARITHMETIC

New arithmetic scheme. Highest efficiency. Endless possibilities. Maximum information in minimum space. Allows the greatest optimizations. Most versatile, a little under 16*2=32 addressing modes (X,*(X)). Easy. Same operands for all arithmetic. Much smaller and smarter than the equivelant in Intel, ARM and especially Java bytecode.
Code:
ALU=AAAA=0-15 = AND OR XOR TST SHL SHR SAR ROR ADD SUB ADC SBC MUL IMUL DIV IDIV ALU R,R = 1001.AAAA RRRR.RRRR ALU R,I = 1010.AAAA RRRR.VVSS (I) ALU R,X = 1011.AAAA RRRR.MODE <M> ALU R,*X = 1100.AAAA RRRR.MODE <M> ALU *X,R = 1101.AAAA MODE.RRRR <M> ALU *X,I = 1110.AAAA MODE.VVSS <M>(I) ALU R,R,R = 1000.AAAA 0001 RRRR RRRR.RRRR ALU R,R,I = 1000.AAAA 0010.RRRR RRRR.VVSS (I) ALU R,R,X = 1000.AAAA 0011.RRRR.RRRR.MODE <M> ALU R,X,R = 1000.AAAA 0100.RRRR.MODE.RRRR <M> ALU R,X,I = 1000.AAAA 0101.RRRR.MODE.VVSS <M>(I) ALU R,I,X = 1000.AAAA 0110.RRRR.VVSS.MODE (I)<M> ALU R,R,R,R = 1000.AAAA 0111.0000 RRRR.RRRR RRRR.RRRR RESERVED = 1000.AAAA 1XXX.XXXX DIV A,B,C = A=B/C ; 32BIT source/result MUL A,B,C = A=B*C DIV A,B,C,D = A=C:B/D ; optional 64BIT MUL A,B,C,D = B:A=C*D TRULY THE BEST!


POWER MACHINE ARCHITECTURE ((C), UPDATED EVERY 2-3 DAYS)

DISASSEMBLY
Code:
; 0CA0 push r10 ; 08B0 pop r11 ; 0E6EDB pushm r0-r1,r3-r4,r6-r7,r9-r11,r13-r14 ; 0ADDB6 popm r1-r2,r4-r5,r7-r8,r10-r12,r14-r15 ; 4012 let r1=r2 ; 4174 let r7=1 ; 4170 let r7=0 ; 417F78563412 let r7=12345678h ; 42720F0378563412 let r7=r15+12345678h ; 42A7BCDE let r10=r11+(r12*r13)+r14 ; 42ADBCDE let r10=r11+(r12>>r13)+r14 ; 42A8BCFF let r10=r11+(r12<<1111b)+(111b*4) ; 42A9BCFF78563412 let r10=r11+(r12<<11111b)+12345678h ; 98AB add r10, r11 ; 99AB sub r10, r11 ; A274 xor r7, 1 ; A378 tst r7, FFFFFFFFh ; AA7F78563412 adc r1, 12345678h ; BB1D2345 sbc r1, r2+(r3<<r4)+r5 ; BC1823FF mul r1, r2+(r3<<1111b)+(111b*4) ; 8E1234 div r1, r2, r3, r4 ; A7E4 ror r14, 1

OBJECTIVE. 2-DO:

All my life's programming experiences have been for this moment:
Quote:
* Write FASM macros to translate PM to I32+ARM
* Make Abakis generate PM for I32+ARM (more modes/expressions!)
* Generate .PM executable (would be easier: store p: as 'file' ; save headaches)
* Write FASM macros to disassemble .PM executable
* Verify all instructions 100%, 5+ times
* Ninja magic: https://www.youtube.com/watch?v=JWPNxSD9YNY&list=PLC80D8D317B885DF3
* Create standalone PM emulator for I32+ARM (Windows Mobile)
* Create standalone Power Assembler for I32+ARM
* Create standalone Power Disassembler for I32+ARM
* Relax. Play games or design software which is more productive
* Create Power System Interrupts
* Create examples
* Share with FASM community. Work for Kolibri. Offer file explorer, touch launcher, etc
* C4Droid: Convert standalone PM assembler+disassembler+emulator to C4Droid using QT library. Export > APK. Smallest text editor: Save. Run. DASM. Help. Etc.
* Submit Power Machine Mobile to Android Market. Title: "Power-Machine Mobile: Assembler Programming". Price: FREE. Assemble/disassemble + Basic Interrupts (example: Draw text). Optional "Power System Interrupts" for serious programming. Price: $5. Hope for 1,000+ sells
* Use Power-Machine to do Android programming. Make $$$
* Create portable OS with Power-Machine
* Create bigger and better programs, utilities, automation, "Just-Click"
* Create Native Play Store. Help independent developers get paid Smile Promote only good native compilers: FASM+ARM, Abakis, TinyCC, BC++ 3.1, C386, GCC ARM, etc. Emphasize "Real CPU machine code. Portable standalone software. Runs anywhere, from USB/SD/HD/X. No setup or installation. Only pay+download once"
* Create native I-TOUCH OS. Hire programmers to write popular drivers for ARM/X devices. Take 100,000+ programmers from Microsoft and Oracle. Help Menuet. Charge Kolibri
* Make $$$. Advance. Invest in solar energy and real estate. Start with small local business. Setup Chinese manufacturers to reproduce my inventions/prototypes/devices/electronics. Example: Pocket Programming device with bigger screen (say 5.5"), good keyboard and multiple languages. Help the world.

_________________
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Last edited by m3ntal on 06 Feb 2015, 16:23; edited 2 times in total
Post 01 Feb 2015, 22:56
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m3ntal



Joined: 08 Dec 2013
Posts: 296

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New FASM Site, Examples, Graphics, Updated Libraries


Last edited by m3ntal on 06 Feb 2015, 16:22; edited 1 time in total
Post 02 Feb 2015, 04:28
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m3ntal



Joined: 08 Dec 2013
Posts: 296
Update: Power Assembler + Disassembler: POWER.ZIP. Not finished or official. Only the beginning. Nice disassembly produced by macros:
Code:
; POWER DISASSEMBLER ; OFFSET_CODE______________ASM____________________________ ; $1122334455667788 00000000 $0000 bkp 00000002 $01ABCD sys $ABCD 00000005 $02ABCD exc $ABCD 00000008 $0C07 push r7 0000000A $0807 pop r7 0000000C $0E6EDB pushm 0110111011011011b 0000000F $0ADDB6 popm 1101110110110110b 00000012 $4012 let r1=r2 00000014 $4147 let r7=1 00000016 $4107 let r7=0 00000018 $4187 let r7=$FFFFFFFF 0000001A $41C777 let r7=$77 0000001D $41D71234 let r7=$1234 00000021 $41E7AABBCC let r7=$AABBCC 00000026 $41F712345678 let r7=$12345678 0000002C $424789 let r7=r8<<r9 0000002F $42578F let r7=r8<<1111b 00000032 $42678F let r7=r8+(111b*4) 00000035 $427ABCDE let r10=r11+(r12*r13)+r14 00000039 $42DABCDE let r10=r11+(r12>>r13)+r14 0000003D $429ABCFF123456.. let r10=r11+(r12<<11111b)+$12345678 00000045 $98AB add r10, r11 00000047 $99AB sub r10, r11 00000049 $A247 xor r7, 1 0000004B $BA712345 adc r1, r2+(r3*r4)+r5 0000004F $BBD12345 sbc r1, r2+(r3>>r4)+r5 00000053 $BCE12345 mul r1, r2+(r3<>>r4)+r5 00000057 $8E701234 div r1, r2, r3, r4 0000005B $A74E ror r14, 1 0000005D $B0C12345 and r1, r2+(r3<<r4)+r5 00000061 $B1D12345 or r1, r2+(r3>>r4)+r5 00000065 $B2E12345 xor r1, r2+(r3<>>r4)+r5

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Post 06 Feb 2015, 16:22
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m3ntal



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Posts: 296
Update: Power Assembler + Disassembler: POWER.ZIP. Not finished or official. I intend to create an emulator in standard C and a Abakis+C compiler that generates PM.

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Post 06 Feb 2015, 17:22
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m3ntal



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...


Last edited by m3ntal on 10 Feb 2015, 21:33; edited 1 time in total
Post 07 Feb 2015, 12:47
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 15864
Location: 162173 Ryugu
Can I assume that you are using this encoding as an intermediate step towards producing assembly code? Kind of like Java, .NET or The Mill?
Post 07 Feb 2015, 12:53
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m3ntal



Joined: 08 Dec 2013
Posts: 296
UPDATED POWER-MACHINE

Improved assembler and disassembler written with FASM's macro system (for FASM Linux, Menuet, Kolibri, X). Working on translation module (TRANSLATE.INC).
Code:
; $1122334455667788 00000000 $0000 bkp 00000002 $01ABCD sys $ABCD 00000005 $0C07 push r7 00000007 $0807 pop r7 00000009 $0E6EDB pushm 0110111011011011b 0000000C $0ADDB6 popm 1101110110110110b 0000000F $1012 let r1=r2 00000011 $1147 let r7=1 00000013 $1107 let r7=0 00000015 $1187 let r7=$FFFFFFFF 00000017 $11C777 let r7=$77 0000001A $11D71234 let r7=$1234 0000001E $11E7AABBCC let r7=$AABBCC 00000023 $11F712345678 let r7=$12345678 00000029 $122123 let r1=r2+r3 0000002C $123789 let r7=r8-r9 0000002F $124789 let r7=r8*r9 00000032 $12578F let r7=r8<<1111b 00000035 $12678F let r7=r8>>>1111b 00000038 $12778F let r7=r8+(111b*4) 0000003B $1281D71234 let r1=r7+$1234h 00000040 $12B10234 let r1=r2+(r3*r4) 00000044 $12B1D2341234 let r1=r2+(r3*r4)+$1234 0000004A $12C12345 let r1=r2+(r3*r4)+r5 0000004E $12917023 let r1=r2+(r3<<111b) 00000052 $1291FF23 let r1=r2+(r3<<111b)+(1111b*4) 00000056 $12A10F23 let r1=r2+(r3<<1111b) 0000005A $12A1CF2377 let r1=r2+(r3<<1111b)+$77 0000005F $9047 and r7, 1 00000061 $924A xor r10, 1 00000063 $88AB add r10, r11 00000065 $89AB sub r10, r11 00000067 $AAC12345 adc r1, r2+(r3*r4)+r5 0000006B $AB91FF23 sbc r1, r2+(r3<<111b)+(1111b*4) 0000006F $ACA10FBC mul r1, r11+(r12<<1111b) 00000073 $EE701234 div r1, r2, r3, r4 00000077 $A8C12345 add r1, r2+(r3*r4)+r5 0000007B $54F7 go $85 0000007D $ACB1D2347777 mul r1, r2+(r3*r4)+$7777 00000083 $540D go $77 00000085 $12C12345 let r1=r2+(r3*r4)+r5
CUSTOM EXPRESSIONS, IDEAS

This will be implemented soon:
Code:
let r1=r2<<r3 let r1=r2+(r3*r4) let r1=r2&(r3<<1111b) let r1=r2|(r4>>r5) let r1=r2*(r3/r4) let r1=r2/(r3*r4)>>>r5
<?>/<AA> can be any ALU operator and X can be any mode. Up to 5 registers and 3 operators are allowed. Precedence is always left to right. () reorders them to be: A,B,C. Example: C+(A*B) = A*B+C.
Code:
; * LET R=R<?>R = 0001.**** <AA>.RRRR RRRR.RRRR ; * LET R=R<?>I = 0001.**** <AA>.RRRR RRRR.VVSS (I) ; * LET R=R<?>X = 0001.**** <AA>.RRRR RRRR.MODE <M> ; * LET R=\ = 0001.**** <AA>.<AA> RRRR.RRRR ; R<?>R<?>R RRRR.RRRR (4 BYTES) ; * LET R=\ = 0001.**** <AA>.<AA> <AA>.RRRR ; R<?>R<?>R\ RRRR.RRRR RRRR.RRRR (5 BYTES) ; <?>R ; EXAMPLE: LET R1=R2*(R3/R4)<<R5 (5 BYTES)
ADDRESSING MODES

Updated addressing modes for new let expressions.

Image

POWER-MACHINE VS VIRTUAL MACHINE

"Virtual Machines" (Java+CIL) are "toy assemblers" that can't access memory (*p++=0) or do expressions: r10=r11+(r12<<11111b)+$12345678, equates to arrays and structures, a[i*s]->x. Not usable for systems programming. Not standalone source; requires .CLASS, constant table, library imports.

Image

PS: To design tables, documents, software, architecture, etc, I use Microsoft Publisher (since 97') and Open Office on Android (MiniX 5 HDMI) or Linux (RPI).

ENDIAN: HIGH VS LOW

PM is high-endian.
Quote:
"What's the difference between low and high endian?"
Same as the difference here:
Code:
for i=0, i<n, i++ ; loop i=0 to n ; ... ; high-endian, left to right end ; the way humans read, 0-n for i=n, i>0, i-- ; loop i=n from 0 ; ... ; low-endian, backwards, n-0 end
If you think data/numbers/colors/images/etc should be stored backwards or upside down, it's because your logic/algorithm is reversed.

revolution: Yes, an intermediate language, but not like Java, a "Native Machine" that will feature both translation + emulation. Example:
Code:
sub r1, r2+(r3<<r4)+r5 ; PM r1-=r2+(r3<<r4)+r5; // C mov eax, [esi+?3] ; INTEL mov ecx, [esi+?4] shl eax, cl add eax, [esi+?2] add eax, [esi+?5] sub [esi+?1], eax ldr r1, [r12, ?1] ; ARM ldr r2, [r12, ?2] ldr r3, [r12, ?3] ldr r4, [r12, ?4] ldr r5, [r12, ?5] add r0, r2, r3 lsl r4 add r0, r5 sub r1, r0 str r1, [r12, ?1]

Quote:
Power-Machine; Smaller than Intel+ARM+Bytecode. Stronger than ARM and M68K.

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Post 10 Feb 2015, 19:16
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m3ntal



Joined: 08 Dec 2013
Posts: 296
MIRACLE/3 ASSEMBLER

New encoding scheme: Miracl3. Smallest CPU I've ever designed or seen or heard of. Practiced encoding and decoding machine code since 1990-ish.

Ultra-compressed. All fixed 2-byte (16BIT) instructions with 16 registers, addressing modes, pointer arithmetic and more. Acheives the "impossible".

About 500%-800%+ smaller than Intel32. At least 1200%+ smaller than ARM32 and 333%-700%+ smaller than Thumb. Truly a miracle.

Example partial/pseudo disassembly.
Code:
; MIRACL3 ASSEMBLER 00000000 $0000 .data size 00000000 $0000 ... 00000000 $0000 .code size 00000000 $0000 ... 00000000 $0000 nop 00000000 $0000 bkp 0 00000000 $0000 sys #5:7 00000000 $0000 push r10 00000000 $0000 popf 00000000 $0000 push 10101010b 00000000 $0000 pop r15 00000000 $0000 push (bp+(1111111b*4)) 00000000 $0000 pop4 *(bp+(1111111b*4)) 00000000 $0000 pushm r0-r15 00000000 $0000 popm r0-r15 00000000 $0000 mov r10=r11 00000000 $0000 add r0, 10100101b 00000000 $0000 mov4 *r7++=0 00000000 $0000 xor r1, r2, r3 00000000 $0000 udiv r7, r2, r1, r0 00000000 $0000 imul4 *r1++, *r2++ 00000000 $0000 ror r7, 27 00000000 $0000 mov r0=101010101010b 00000000 $0000 mov r0=(ip+(111111111111b*2)) 00000000 $0000 mov r0=(ip-(111111111111b*2)-2) 00000000 $0000 mov r0=11111111111111111111111111111111b 00000000 $0000 mov r0=11111111111111111111111100000000b 00000000 $0000 mov r0|(11111111b~>>(11b*8) 00000000 $0000 mov r0=((1111b+1)*kb) 00000000 $0000 mov r0=((1111b+1)*mb) 00000000 $0000 mov r0=((1111b+1)*gb) 00000000 $0000 mov r0=(bp+(1111b*4)) 00000000 $0000 mov r0=(bp-(1111b*4)) 00000000 $0000 mov r2=(r7+(r2*4)) 00000000 $0000 mov r2=(r7+(r2*r3)) 00000000 $0000 mov4 r2=*(r7+(r3*4)) 00000000 $0000 mov4 *(r7+(r3*4))=r2 00000000 $0000 mov1 r5=*r12++ 00000000 $0000 mov4 *r10++=r2 00000000 $0000 mov1 *r7++=*r15++ 00000000 $0000 mov4 r7=*(bp+(1111b*4)) 00000000 $0000 mov4 *(bp-(1111b*4))=r7 00000000 $0000 mov4 *(bp+(1111b*4))=1 00000000 $0000 mov4 *(bp-(1111b*4))=0 00000000 $0000 rep 47 { 00000000 $0000 mov4 *r7++=0 00000000 $0000 imul4 *r1++, *r2++ 00000000 $0000 } 00000000 $7ABC mov r0=$ABCDEF 00000000 $DDEF $data $DEF 00000000 $0000 go (ip+(1111111111b*2)) 00000000 $0000 call r15 00000000 $00AB call (ip+(10101011000100100011b*2)+2) 00000000 $D123 $data $123 00000000 $0000 shl r13, r14 00000000 $0000 add4 *r7++, 2 00000000 $0000 sbc r1, r2, 4 00000000 $0000 shr4 *r5, 8 00000000 $0000 xor r10, r11 00000000 $0000 udiv4 *r1++, *r2++ 00000000 $0000 sar r7, r3, 1 00000000 $0000 ror r1, 23 00000000 $0000 tst r3, r7 00000000 $0000 sub4 *(bp-(1111b*4)), 1 00000000 $0000 imul4 *r1++, r2 00000000 $0000 idiv r7, r3, r1, r0 00000000 $0000 xch r12, r1 00000000 $0000 rev r3, 16 00000000 $0000 rev r4, 24 00000000 $0000 rev r5, 32 00000000 $0000 go $00 00000000 $0000 gif ne, $00 00000000 $0000 gif r0=0, $00 00000000 $0000 gif r0=1, $00 00000000 $0000 gif r0=!0, $00 00000000 $0000 gif r0=-1, $00 00000000 $0000 sif ne, r0=1 00000000 $0000 zif e, r0=0 00000000 $0000 if r0=1 { 00000000 $0000 nop 00000000 $0000 } eif r0=2 { 00000000 $0000 ... 00000000 $0000 nop 00000000 $0000 } eif r0>1111b { 00000000 $0000 ... 00000000 $0000 nop 00000000 $0000 } else { 00000000 $0000 nop 00000000 $0000 } 00000000 $0000 enter(3, 0, 0) { ; no locals 00000000 $0000 mov a1=bp[1] ; use HL 00000000 $0000 mov a2=bp[2] ; syntax 00000000 $0000 mov a3=bp[3] ; or &bp[x] 00000000 $0000 shr a3, 2 00000000 $0000 reps a3 00000000 $0000 mov4 *a1++=*a2++ 00000000 $0000 leave 1 00000000 $0000 } 00000000 $0000 sys #7:12 (Draw.Image(&I,#X,#Y))
Preview encodings:
Code:
; 0123.4567.89AB.CDEF ; 0010.00#P.<I8>.RRRR ; PUSH/POP R/I. SINGLE ; 0010.010P.FROM.TO.. ; PUSHM/POPM. MULTIPLE ; SAME.010P.0000.1111 ; PUSHA/POPA. ALL=$0F ; 0010.??1&.+###.#### ; PUSH/POP &/IP[+-#7*2] ; 0010.??0&.+###.#### ; PUSH/POP &/BP[+-#7*4] ; 0010.111-.----.---- ; <RESERVED> ; IP[X]: VARIABLES BEFORE/AFTER FUNCTION ("STATIC") ; BP[X]: LOCALS & PARAMETERS
Code:
; 0123.4567.89AB.CDEF ; ????.000#.AAAA.BBBB ; MOV @4=@4|#4 ; CANT.####.####.#### ; MOV R0=I12|$D/24 ; SHOW.0$+&.####.#### ; MOV R0=&/IP[+-#8*2|$D1/20*2] ; YET..1??P.####.#### ; ADD/SUB IP+-#8*2|$D1/20*2 ; ????.10NN.####.#### ; MOR R0|(#8~>>(8/16/20/24)) ; ... ; ????.0*+&.AABB.BCCC ; MOV @2=&/@3[+-@3(*4)] ; ????.1*+0.AAAB.BBCC ; MOV @3[+-@3(*4)]=@2 ; ????.1*+1.AAAB.BB## ; MOV @3[+-@3(*4)]=I ; ... ; ????.S??0.+AAA.ABBB ; MOV1/4 *@4/++=*@3/++
Code:
; INITIALIZE STACK FRAME: # PARAMETERS ; (SIZE/4), LOCALS SIZE SHIFT. POWER OF 2, ; ROUND UP. 4-16K. ZL=ZERO LOCALS? ; ENTER NP,LS=(1 SHL L),ZL?=1/0 ; 0123.4567.89AB.CDEF ; 1111.000Z.<PP>.<LL> ; ENTER NP,LS,ZL? ; 1111.0001.0000.<R0> ; LEAVE (R0|NONE) ; 1111.00#1.<I8>.RRRR ; LEAVE @4/#8 (|R0) ; 1111.010+.####.#### ; LEAVE +#8|0-#8 ; 1111.100&.+###.#### ; LEAVE &/IP[+-#7*2] ; 1111.101&.+###.#### ; LEAVE &/BP[+-#7*4] ; 1111.1--1.----.---- ; <RESERVED> ; enter 2, 3, 0 ; function f(a,b) ; ; locals a, b ; (1<<3)=8 for 2 locals ; ; ... ; ... ; leave 1 ; return 1 ; "LEAVE" RETURNS AN OPTIONAL VALUE IN R0, ; -255 TO +255
Compare: Miracl3 VS ARM's Thumb1 16BIT

Quote:
* Instruction type: Both fixed 16BIT
* Register size? Both 32BIT
* Number of registers? Miracl3: 16 + BP[+-I]. Thumb: 8
* Number of operands? Miracl3: 3-4. Thumb: 2.5
* Move 24/32BIT immediate? Miracl3: Yes, with 1-2 dedicated "$data immediate" tags. Not executed. Easy: mov r0=$123.ABC | $data $ABC (for 24BIT+). Thumb: No, numbers are unreadabe with "orr+ror 3Ah" in my ARM disassemblers (it doesn't help that bytes are reversed!)
* Immediate sizes? Miracl3: 1-32BIT. Very generous. Thumb: 3/8BIT. Severely crippled
* Immediate address distance (in one 2-byte instruction)? Miracl3: 16K effectively: IP+-8K. (ip+-(111111111111b*2)) in both directions. Thumb: Under 1K! Requires re-creation of constants closely nearby within the same modules.
* Powerful arithmetic? Miracl3: Yes with expressions and 3-4 operands. Thumb: No, need more instructions.
* Arithmetic with memory? Miracl3: Yes, idiv *r1++=*r2++. Thumb: No and this is important. 2-4+ more instructions
* Access locals and parameters in one instruction? Miracl3: Yes. Thumb: No
* Pointer arithmetic? Miracl3: Yes. Example: Multiply sequence of integers: rep 16 { imul4 *r1++, *r2++ }. Thumb: No
* Usable "Out of Box"? Miracl3: Yes. No setup. Use "big" 16/20/24/32BIT immediates. Locals and parameters are automatic variables. Thumb: Must write your own "pseudo-instructions", literals
* Easy functions? Miracl3: Yes, enter and leave with parameters #, locals size (1 shl N). Thumb: No concept
* Real IF-style blocks? Yes, to create for/while/loop. Thumb: No, confusing IF-THEN
* Loop/repeat sequences? Miracl3: Yes, "gif, go if" and multi-line rep/eat. Thumb: No
* Call immediate? For jump tables? "Local" methods? Object.Get.X/Set.X Miracl3: Yes, call (ip+-(1111111111b*2)) or R or 20BIT. Thumb: No.
* Identifies "data" and "code"? Miracl3: Yes, system/debug settings. Thumb: No, random data in disassemblers
* Available instructions? Miracl3: 100s of remaining encodings. Thumb: Little or none.


COMPARE: ARBITRARY IMMEDIATES (12345678h)
Code:
12BIT: $ABC. 400%+ SMALLER ; Miracl3: 1 instruction, 2 bytes, 16BIT mov r0=$ABC ; Thumb: 4 instructions, 8 bytes, 64BIT mov r0, $BC mov r1, $0A shl r1, 8 orr r0, r1 24BIT: $ABCDEF. 333%+ SMALLER ; Miracl3: 2 instructions, 4 bytes, 32BIT ; $data is automatic with mov, never needed ; in ASM source mov r0=$ABCDEF $data $DEF ; Thumb: 7 instructions, 14 bytes, 112BIT mov r0, $EF mov r1, $CD shl r1, 8 orr r0, r1 mov r1, $AB shl r1, 16 orr r0, r1
Quote:
So small it's a miracle. Miracl3 => "Mi"crosoft & O"racl"3. Mailed documents to myself. Must pay for another (C). Please excuse any typos

_________________
New FASM Site, Examples, Graphics, Updated Libraries
Post 15 Feb 2015, 22:24
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m3ntal



Joined: 08 Dec 2013
Posts: 296
CODE COMPRESSION

Maximum compression based on probability. I can't release all my special algorithms (must get another official (C), mailed to myself), but I can show general techniques that I've developed. Pseudo..

Image

(Legal: No business/corporation can patent my ideas and prevent anyone from using them. In US, a patent is too expensive for "poor" individuals (say <$7K yearly) and you've gotta have big $ to defend it. BS. I have 1,000s of inventions and product designs and could never afford a patent. All for (C) on code+programs)
Post 16 Feb 2015, 18:25
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m3ntal



Joined: 08 Dec 2013
Posts: 296
Why *2 for IP and *4 for BP?

IP is only guaranteed to be even. 32BIT integers must be aligned by 2. The +-2/4 after depends on forward/reverse and if there are 1-2 "$data immediate/s" following. BP should be *4.

Why 0-F? It should be F-0.

Just easier for me to read. I'm not trying to reverse bits. I'm only against reversing the bytes in addition to the bits. Need: rev r, 16/24/32.

Why +-N? Why not + signed N as in X86?

Why separate the sign in some instructions (ie, go/call/ip/bp) and make it a choice? That's what gives it the power in both directions. Example: +-(10BIT*2) has twice the range of + signed (10BIT*2). Maybe this will help understand:
Code:
1. XXXX.00&+.AAAA.[B#] ; MOV @4=&BP[+-#4*4] 2. XXXX.1000.AAAA.[B-] ; MOV BP[-#4*4]=@4 1. BP+-(I4*4). Locals and parameters. Un/signed makes sense with 14-16 maximum parameters 2. BP-(I4*4). Just locals, - for twice the negative range
I thought a similar idea could apply to IP with "static" variables preferred *before* the function (literal table is usually after, forward reference).

As for arithmetic, sign is chosen by the instruction. mov1=unsigned bytes.

Why not do this for 15BIT immediate? INNN...
Code:
1NNN.NNNN.NNNN.NNNN: Move R0=I15 0XXX.XXXX.XXXX.XXXX: Remaining instructions
I would never reserve the highest leftmost bit, it divides the number of possibilities in 1/2 (ie, 32K instead of 64K). Not a good way to start. Try this:
Code:
0001.XXXX.XXXX.XXXX
We must be very cautious in the leftmost nibble. Only 16 choices there.

I'd like to create a "Visual Encoder" (/CPU Designer) program that allows me/anyone to design encodings, insert BITs and "variable sections". It should tell exactly how many configurations are remaining everytime you set/click a bit or insert a non-bit/"V section": AAAA reserves way more bits than a hard-coded 1010b. Users will know the consequences of every little choice.

In order to design the "best" CPU - smallest and most capable - one would have to analyze executables and the frequency of common syntaxes: like A+B/(A+B*C)/*A++=*B++ (not ADD R,I/*M/X, that depends on CPU).

How to create an OIC with fixed 16BIT-size instructions? (One-Instruction CPU)

This seems like a good idea for beginners:
Code:
XXXX.%**+.+#AA.ABBB ; XXX1%4 *@3/++=*@3/++ ; ONE LINE CPU Smile
X=Opcode/Operation (= or 1-15), %=Size1/4, **=Value at? /++ choice to advance (1/4) either/both pointers. @3=R0-R7 (include IP,SP,BP). If #, 3BIT immediate BBB. See the price you pay for "simplicity" and generaliziation of things that should be encoded with specific details.

On any CPU that has 16 "reserved" BITs available, one can implement a subarchitecture within it. ARM32 PSR has some unused/undocumented BITs. I don't know if the CPU expects them to have certain values. ARM can't do this in 1 instruction: *A++=*B++. Motorola and Miracl3 can. Intel can only do it with: rep movs/stos/x edi++=esi++, ecx. For examples of *A++=*B++, see Abakis > TEXT/DRAW modules.
Post 17 Feb 2015, 15:44
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m3ntal



Joined: 08 Dec 2013
Posts: 296
Miracle Encoder. Micro-CPU architecture. 256 registers. Superior to Intel+ARM in just a few bits. Design your dream CPU. Mailed to myself same day. 3 copies.


Description: Created by m3ntal. 2-17-15*1077*. m3ntal.power=>(((Intel+ARM)*INFINITE)^FOREVER).
Filesize: 44.72 KB
Viewed: 7284 Time(s)

miracle.gif


Post 18 Feb 2015, 06:20
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codestar



Joined: 25 Dec 2014
Posts: 254
Hi, everyone. I'll try to explain this "Miracle Encoder"...

Leftmost nibble (F-C) is your "selector, base, exponent" to categorize instructions comparable to chapters of a book or folders which expand and collapse. In this column, there are 16 choices, 0-15. 4K*16=64K possible instructions.

Rightmost 12BITs (1-C|B-0) are the "mantissa" sections or sub-chapter/s (yellow). They can have 4K (2^12|1<<12) different configurations each, literally 4096 HC ("Hard-coded", 1010b, B/W, not shown yet) instructions following, connected by the yellow "Lines of Uniqueness" - not sure what to call this - with an exception to the NON-bit sections (let's call this "SC/VBITs, Soft-Coded") displayed in color which cause collisions in the pattern. #Immediate and "#Data word 12BIT" (DXXXh) are also SC/VBITs.

Registers A-D can be any variable length from 1-C|B-0. "V Section" can any named variable that is not recognized by the encoder. It could auto-generate an assembler, disassembler & emulator for you/anyone to test your CPU and it could auto-verify the operands, registers, immediates, and their sizes, but the [V] sections would be user-defined. Example: if CODE=0001b, then mov.

Users can create and share instructions Cool Available is the number of possibilities remaining, 64K-used. Penalty is the # used by the most recent action. Example: First row CODE.AAAA.. takes an entire section, 4K.

Price of VBITs (NON-1-0, NON-yellow): 12=4096. 6=2048. 4=1024. 2=512. 1=256. VBIT "purchases" are testable, returnable and refundable with "Undo/Redo action", and of course, they don't cost real money, but there's an universal concept that functionality is not without a "price"=time, work, sacrifice, energy and there are a finite number of bits which you have to manage wisely like a master accountant to optimize your CPU.

How to extract a section of bits ("COD*E*")? Notice the purple COD*E* #1-#4 and the #BITs# below: #B-#8. Shift instruction right by #8 (12-4) then AND/&1111b.
Code:
my.opcode = (my.instruction shr 8) and 1111b ; easy Smile
Why was move immediate "MOV R0=15BIT/1NNN..." a bad idea? Look at 11b in the gray E column. When you add 1 to 0011b (gray, 7th row), it sets the carry flag (CF) which shifts the bit left once (0100b). N111 would be the limit, 1/2 the choices, 0-8, 32K. Move #I+$D is "SC".

Why is software so big/bloated today? (GBs+ Windows, GBs+ VS)?. 1. Immediate sizes, 32BIT+, mov dword [12345678h], 0CAFEBABEh takes about 9-10+ bytes if I remember correctly. 2. Standard address executable base is 00400000h (?), 4+ bytes per instruction. Miracl3 CPU defines the format with .section size, and it begins at 0 or anywhere. An address like 80000XXXh would be fine if there was an instruction that could load a 12BIT then OR (1 ROR 1): mor r0=80000ABCh. 3. Many other reasons.

What about graphics? I'm thinking Micro-Graphics, 2-12BPP, classic consoles and old-school interfaces (inspired by Tomasz's font editor). 4BPP in grayscale or colorscale (16 shades) is good enough for small games, "applets". 12BPP R4.G4.B4 is perfect for this, compatible with RGB24 (/2 or *2, 50% loss of precision).

Thoughts on High VS Low Endian. If you want to reverse the 2 bytes inside 16BIT+ ("word, half, short"), then why not reverse the 4 nibbles within those 2 bytes and the 8 "couples" (what I call them) within those 4 nibbles and the 16 bits within the 8 couples?
Code:
12345678 READABLE ; HIGH-ENDIAN ELBADAER ; LOW-ENDIAN
Sorry, no time.

PS: No image/upload space on previous account, will be efficient this time with only small 4BPP .GIF instruction sequences, 1-3 lines, that I want to embed permanently and external image for everything else that may/will all fail/break sometime in the future.
Quote:
"Encodes Miracles" Smile Idea
Post 19 Feb 2015, 02:49
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codestar



Joined: 25 Dec 2014
Posts: 254
Image
Image
Image
Note: In "bitwise currency", the price of a full line (mov1%4) is $4096 and the "bank" has $65536.
Post 20 Feb 2015, 01:10
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codestar



Joined: 25 Dec 2014
Posts: 254
Micro-Power CPU with Miracle encodings. Old style punch-card programming made easy and modern+ with 16 registers in only 2-bytes. Here are templates (*.PUB) to design your own instructions. They can be inserted independently of the selector A-D value (create, share, trade).. CODE is the operation code, 3-4BIT. 24 (8+16) total instructions can be defined inside COD/E. A/B are the registers, @4=R0-R15. @3=R0-R7. #=Immediate. *=Value at? +=Advance pointer/s? (If 1 +, applies to both: @X+). %=Size: 1/4. |=Or. ?=Choice, in this case, ?=0: #4BIT immediate or ?=1: #16BIT with the following "$DATA word" (4+12, A/BCD, $D.BCD). Example requires 3-4 sections (12K-16K used, 52K-48K remain) and the gray 000 can expand into 7 rows below: 001b, 010b, 011b...

Image

Move Immediate #4/#12/#16/#20/#32 or Branch: GO/CALL #10. ADD/SUB IP, #10*2+-N. P=Push IP first? Call?

Image


Last edited by codestar on 23 Feb 2015, 21:36; edited 1 time in total
Post 20 Feb 2015, 10:44
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baldr



Joined: 19 Mar 2008
Posts: 1651
codestar,

Those glyphs seem to be antialiased. Which filter had you used?
Post 20 Feb 2015, 20:48
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typedef



Joined: 25 Jul 2010
Posts: 2910
Location: 0x77760000
lol, codestar = m3ntal
Post 20 Feb 2015, 21:34
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codestar



Joined: 25 Dec 2014
Posts: 254
Data word example. ? can be used to select 20/32BIT ($D1/$D2) if there is a #8 BIT immediate or 16/28BIT if there is #4 or 12/24BIT if there is no # inside of the instruction. 20BIT direct # (non-IP) is more than ARM can load in one 32BIT instruction, and on Intel and Java/Bytecode, the immediate itself takes 4 bytes! On RPI (<=ARMv6), it takes 3-4 instructions to load this, 12-16 bytes. Miracle encoding schemes are 800%-1200%+ smaller than Intel and ARM.
Image

Example addressing modes. Lines #1-2 take 1 section each. Lines #3-4 are in 1 section. Lines #5+ extend to 8 lines within the same section. #5 is for first 14-16 parameters and locals (+-4BIT), #6-8 are for locals (-5/8BIT). No &=Address operator for assignments. Total is about 4.5 sections, 18K.
Image

ARM-style modes with barrel shifter: A=B<<C. (ASL, LSL, LSR, ROR)? 2 sections for all ($$=0-3) with 3 operands and #5 BIT immediate (0-31):
Image

How to support more registers?
Image

Miracle Disassembler:
Code:
; MIRACLE DISASSEMBLER ; OFFSET_CODE______________ASM____________________________ 00000000 $0602 .code #136 00000002 $D088 $data 00000004 $0000 bug 00000006 $077F sys $0000007F 00000008 $0820 push a1 0000000A $0809 pop a7 0000000C $0CFF push $000000FF 0000000E $0D12 push $12345678 00000010 $D345 $data 00000012 $D678 $data 00000014 $2801 mov a1=a2 00000016 $2829 mov a3=a7 00000018 $277F mov a12=1111111b 0000001A $1ABC mov a1=$00000ABC 0000001C $2C87 mov a1=$07ABC123 0000001E $DABC $data 00000020 $D123 $data 00000022 $3281 mov1 a1=*a2++ 00000024 $3ECA mov4 *a7=*a3++ 00000026 $37D9 mov1 *a9++=*a2++ 00000028 $3D73 mov4 *a12++=a4 0000002A $4A0A mov a1=a2[+a3] 0000002C $5A0A mov a1=a2[+a3*4] 0000002E $641F mov a1=a2[+1111b*4] 00000030 $4E0A mov a1=&a2[+a3] 00000032 $5E0A mov a1=&a2[+a3*4] 00000034 $6C1F mov a1=&a2[+1111b*4] 00000036 $460A mov a1[+a2]=a3 00000038 $5242 mov a1[+a2*4]=a3 0000003A $741F mov a1[+1111b*4]=a2 0000003C $8001 add a1,a2 0000003E $80F7 sub a12,a5 00000040 $9210 shl a1,#16 00000042 $9358 shr a3,#24 00000044 $9468 sar a4,#8 00000046 $8313 and a3,a4 00000048 $8381 or a1,a2 0000004A $980E cmp a1,#14 0000004C $E607 gif e,+$0000005A 0000004E $8D06 ror a1,a2,a3 00000050 $A008 add a1,a3,#1 00000052 $A091 sub a1,ip,#4 00000054 $A012 add a1,ip,$00000ABC 00000056 $DABC $data 00000058 $8481 not a1,a2 0000005A $E487 gif ne,-$0000004C 0000005C $8501 tst a1,a2 0000005E $8581 adc a1,a2 00000060 $8601 sbc a1,a2 00000062 $8681 mul a1,a2 00000064 $8701 div a1,a2 00000066 $A785 imul a1,a2,#4 00000068 $2800 nop 0000006A $F010 enter #1,0,0 { 0000006C $6452 mov a1=bp[+0010b*4] 0000006E $A0C0 sub a3,a1,#1 00000070 $3288 mov1 a2=*a1++ 00000072 $8509 tst a2,a2 00000074 $E052 go ne,-$00000070 00000076 $8082 sub a1,a3 00000078 $F203 leave 0000007A $F1FF } 0000007C $E901 if a1=a2 { 0000007E $2800 nop 00000080 $EE1F } 00000082 $E941 if a1<>a2 { 00000084 $0C00 push $00000000 00000086 $B40E call -$0000006A 00000088 $EE1F } ; SIZE: #138 BYTES

Miracle Encoder
Image


Description:
Filesize: 26.45 KB
Viewed: 7040 Time(s)

miracle8.gif




Last edited by codestar on 23 Feb 2015, 21:32; edited 1 time in total
Post 23 Feb 2015, 21:30
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codestar



Joined: 25 Dec 2014
Posts: 254
baldr: None. Windows 7 default settings.
Post 23 Feb 2015, 21:31
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HaHaAnonymous



Joined: 02 Dec 2012
Posts: 1171
Location: Unknown
Stupid post removed.
Post 23 Feb 2015, 21:37
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