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Index > Non-x86 architectures > cpuid on arm?

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ippasm



Joined: 24 Oct 2013
Posts: 13
ippasm
Hi all,

By searching the list of instructions on the instructions sheet of arm instructions I have not noticed an instruction that we can use to get the cpu id of a cpu.

I have noticed, however, that there is a value in memory with the id of the cpu, but it appears to be in privileged memory.

Is there any way we can get this info without being dependent on the info the os may provide?

I was interested in having different code paths depending on the version of the cpu. For instance, my application could start by using some v4 instructions and then test to see if v6 instructions could be used...

Best regards,

ippasm
Post 11 Nov 2013, 19:02
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
Download the v7 spec here and go to chapter B7 titled: "The CPUID Identification Scheme" to find out all about how to identify the CPU the code is running on.

In general you are looking for CP15 register 0.
Post 11 Nov 2013, 21:48
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ippasm



Joined: 24 Oct 2013
Posts: 13
ippasm
Hi Revolution,

Thanks for your answer. I have just downloaded the said document...

I only had the v6-M one and one for v5.

On the chapter that you have indicated appears this:


All of the CPUID registers are:
• 32-bit read-only registers
• accessible only in privileged modes
• when the Security Extensions are implemented, Common registers, see Common CP15 registers on
page B3-74.

I am a bit confused with the third characteristic of the said registers above... Specifically, what the manual says about the cpuid registers (and the midr register in particular) is that they are read only and only accessible from privileged mode (as I have seen in the case of the midr for versions lower than v7) but it also says that they are common registers when the security extensions are implemented!

So, it appears that when the security extensions are not implemented we are running in privileged mode, so we can directly access the midr register; and when the security extensions are implemented, as these registers are common ones, we (user mode programmers) can access them even on non-privileged mode? Is this correct?

If so, we must start by reading the main id register in this way:

MRC p15,0,<Rt>,c0,c0,0 ; Read CP15 Main ID Register

and then we we find thet the cpuid is implemented (one of the possible values of this register gives this info) and then we can use the cpuid extensions for v7.

Is this right?

For versions below v7 it appears that we must be happy with the info on the midr register...

Best regards,

ippasm

PS - apologies for taking so much time to answer your reply!
Post 12 Nov 2013, 18:33
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
Having, or not having, the security extensions does not change the ability, or inability, to access the MIDR register.

It depends upon your OS as to whether user programs are run in privileged mode or not. Although I would consider it unlikely that the OS will allow user code to run privileged unless it was some proprietary OS that has some special reason to run things in privileged mode.
Post 12 Nov 2013, 22:04
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ippasm



Joined: 24 Oct 2013
Posts: 13
ippasm
Hi Revolution,

When I thought about OSes that allowed user's code to run in privileged mode I was thinking about the old versions of the WinCE OS - the ones that appear in the old microsoft arm emulator. I know all the newer versions of the microsoft and linux OSses use the security extensions.

I asked this because I was thinking about trying to access the midr on this emulator and, if I could, to use it to select code paths for newer emulators...

Either I did not understand your answer or you did not answer whether or not the midr can be accessed by non-privilege code... The manual says that this register can be only accessed by privilege code, but at the same time says this register is part of the common ones... So, my doubt is whether or not the common registers can be accessd from non-privileged code?

Best regards,

ippasm
Post 13 Nov 2013, 18:14
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 16931
Location: In your JS exploiting you and your system
revolution
The term "common registers" does not mean you can access them from non-privileged mode. At no time can user mode code access the MIDR register.

An OS does not need to "use the security extensions" to deny access to the MIDR (or other registers) all it has to do is put the task into non-privileged mode.
Post 13 Nov 2013, 22:16
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ippasm



Joined: 24 Oct 2013
Posts: 13
ippasm
Thanks!

In this way, user-mode non-privileged programs can only access the info on the midr if the OS provide this info somehow, isn't it?

Thanks for your paticience.

Best regards,

ippasm
Post 13 Nov 2013, 23:51
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 16931
Location: In your JS exploiting you and your system
revolution
There may be other ways to determine which instructions are available depending upon how you OS is written. If your OS will pass exceptions back to your program then you can just execute a representative instruction for each ISA version and see if it causes an exception. From that you can discover the CPU capability.
Post 14 Nov 2013, 08:11
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ippasm



Joined: 24 Oct 2013
Posts: 13
ippasm
Great tip! :-)

Finding those instructions is easy, because on the sheet of arm instructions each one of them gives info regarding its compatibility with each ISA...

Catching excetions in x86 (x32 and x64) is also explained somewhere in the forum. But do you know if there is some thread there with explanations regarding how to implement exceptions for wince and linux for arm?

Best regards,

ippasm
Post 14 Nov 2013, 17:52
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