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Index > OS Construction > Changed: 64-bit VESA minimalistic example [SOLVED]

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Madis731



Joined: 25 Sep 2003
Posts: 2139
Location: Estonia
Madis731 16 Jun 2010, 12:05
EDIT: Please read the newest post!
CHANGELOG:
VESA mode listing added
mode selection still static
long mode does not support 4KB pages on LFB! (is it always true?)



I found myself going through all the tutorials and finding nothing new so I figured I'd post here. I just want to understand RealMode Smile
My problem is that I need a very simple bootloader, but after I load my kernel, I do not want to use messy org+offsets and segment overrides. I do want to initialize PIC and APIC and VESA.

If you haven't noticed the http://www.brokenthorn.com/Resources/OSDev6.html demo silently replaces org 0x7C00 with org 0 and doesn't explain anywhere why and how.

Code:
     ;----------------------------------------------------
     ; code located at 0000:7C00, adjust segment registers
     ;----------------------------------------------------
        cli                  ; disable interrupts
        mov     ax,0x07C0    ; setup registers to point to our segment
        mov     ds,ax
        mov     es,ax
        mov     fs,ax
        mov     gs,ax 
    


If code is located @0:7C00, why wouldn't
org 0x7C00
mov ds (es,fs,gs), ax=0 work?

=PAUSE=

Another problem I have is Stage 2.
Code:
org 0x10000 ; @ 10000
start:
        xor     ax,ax
        mov     ds,ax
        mov     es,ax
        mov     ax,0x9000
        mov     ss,ax
        xor     sp,sp
    


16-bit mode doesn't support over 64KB very well (A20 is enabled).
Code:
lgdt    [gdtr] ;This works fine because the address is given in DWORD
    


What if I tried it the "correct" way
Code:
org 0 ; or should it be org 0x10000 now?
start:
        mov     ax,0x1000
        mov     ds,ax
        mov     es,ax
        mov     ax,0x9000
        mov     ss,ax
        xor     sp,sp
    

hmm...
Code:
lgdt    [gdtr] ;This doesn't work because it doesn't offset by 0x10000
;To make it work I need to do:
lgdt    [ds:gdtr] ; really messed up - shouln't ds be the default Smile

mov di,vesa_info
; If I tried to get the LFB address with an interrupt
int 0x10
; it doesn't return anything useful (=0)
; for that I somehow need to tell int 0x10 what segment to
; use, but I figured that one out myself
; Its ES
; ...or I could go the edi way
mov edi,vesa_info+0x10000 ; This works, but is ugly
    


Is there any nice tutorial left on the net or am I chasing ghosts?

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Last edited by Madis731 on 13 Jul 2010, 12:22; edited 3 times in total
Post 16 Jun 2010, 12:05
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baldr



Joined: 19 Mar 2008
Posts: 1651
baldr 16 Jun 2010, 12:48
Madis731 wrote:
If code is located @0:7C00, why wouldn't
org 0x7C00
That's probably leftovers from MASM source.

Why don't you post/attach entire source (since it seems to be different from Demo* at the site you've linked to)?

A20 gate enable/disable has nothing to do with 64 KiB segment size. It controls wrap-around of addressing space near 1 MiB in real-address mode.

PICs/APICs can (and probably should) be initialized from PM. VBE functions are often accessible from PM too, but the method is cumbersome at least, so RM video initialization seems to be good choice.
Post 16 Jun 2010, 12:48
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Madis731



Joined: 25 Sep 2003
Posts: 2139
Location: Estonia
Madis731 16 Jun 2010, 13:06
Ok, sounds good - I know I can ignore A20, xPIC and focus on the real parts.
If I get home, I will find the source that doesn't work Smile

I think the right choice would be:
1) init VESA
2) init GTD/IDT/paging
3) goto PM

maybe I'm too lazy to write it a 3-stage loader, but I think it can be done in 2 Smile
Post 16 Jun 2010, 13:06
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sinsi



Joined: 10 Aug 2007
Posts: 790
Location: Adelaide
sinsi 16 Jun 2010, 13:38
If A20 is left disabled, you won't be able to access each odd MB (1-2,3-4 etc.)
Post 16 Jun 2010, 13:38
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cod3b453



Joined: 25 Aug 2004
Posts: 618
cod3b453 16 Jun 2010, 17:28
There's no single "correct" org/xs combination, due to the way in which multiple seg:off will map to the same linear address. Personally, I use org 0x7C00, ds/es/ss = 0 since this will save you having to add the correct offsets to labels and can treat address under 0x10000 as if they are linear.

lgdt takes an absolute address by default (ds could cause problems when switching modes).

You can simply do A20+VESA, (E820 mem-map), GDT and PM and then do everything else afterwards.
Post 16 Jun 2010, 17:28
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Tyler



Joined: 19 Nov 2009
Posts: 1216
Location: NC, USA
Tyler 16 Jun 2010, 18:08
Why do you want to make your own boot loader at all? Grub will do all that for you, and you can just use a boot kernel to do all the initing.
Edit: Oh, it's for research reasons, sorry.

The two ways of addressing 7c00 are the same, but I'm like cod3b453, I use org 7c00.
7c0:0 = 7c0*10=7c00
0:7c00 = 7c00
Post 16 Jun 2010, 18:08
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bitshifter



Joined: 04 Dec 2007
Posts: 796
Location: Massachusetts, USA
bitshifter 16 Jun 2010, 21:12
I prefer to boot at 0x0000:0x7c00
That way i can muck with the IVT directly.
Also i prefer to load in 16 bit mode and let the kernel go 32 enable a20 etc...
This way the same loader can be used for either 16 or 32 bit os.
Code:
org 0x7c00
use16
jmp 0:start
start:
mov ax,cs
mov ds,ax
...
    

Also gdtr base should be linear address (segment * 16 + offset)
Dont forget that demo uses a temp gdt in asm then a new gdt in C.
Post 16 Jun 2010, 21:12
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Madis731



Joined: 25 Sep 2003
Posts: 2139
Location: Estonia
Madis731 17 Jun 2010, 07:12
Here's some help on the problem. I've attached the somewhat working version (the 32-bit one) and a new VESA64 folder for which the conversion is still in progress.

The tree is D:\Programs\QEMU\VESA\ or \VESA64\ Bochs needs to be reconfigured if you need to test that.

I've done some changes according to your suggestions. Stage1 remained the same, but Stage2 has org 0x10000 in it + segment hints on every possible mem.ref.




EDIT2: Ok - the problem was me, of course, as usual Sad
the PIC reprogramming had an iretd in it and some writing @B0000 space (BIOS fonts). After these corrections and adding 2MB of pages to 0xE0000000 - everything works Smile

Sorry to bother you, guys...

<attach deleted, read new posts>

_________________
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Last edited by Madis731 on 13 Jul 2010, 12:23; edited 1 time in total
Post 17 Jun 2010, 07:12
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Madis731



Joined: 25 Sep 2003
Posts: 2139
Location: Estonia
Madis731 08 Jul 2010, 14:01
I wonder what might cause a page fault at the offset of 0x140000 on real hardware. It works on QEMU and Bochs.

It should switch to a mode and clear the whole screen Height*Width*BPP with 16-byte MOVDQA-s, but it will pagefault at 0xFB140000 on a Dell D830. It will reboot with some other modes. Really strange. The 640x480 mode works because 640x480x4=1228800 which is less than 0x140000=>1310720 bytes.

Any thoughts?

<attach deleted, read new posts>

_________________
My updated idol Very Happy http://www.agner.org/optimize/


Last edited by Madis731 on 13 Jul 2010, 12:23; edited 1 time in total
Post 08 Jul 2010, 14:01
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egos



Joined: 10 Feb 2009
Posts: 144
egos 09 Jul 2010, 07:42
Madis731 wrote:
Another problem I have is Stage 2.
Code:
org 0x10000 ; @ 10000
start:
        xor     ax,ax
        mov     ds,ax
        mov     es,ax
        mov     ax,0x9000
        mov     ss,ax
        xor     sp,sp
    
If you put 16-bit code of stage2 bellow 0x10000 (for example at 0x8000) you can use unified linear space.
EBDA will be destroyed by your code during execution.
Madis731 wrote:
What if I tried it the "correct" way
Code:
org 0 ; or should it be org 0x10000 now?
start:
        mov     ax,0x1000
        mov     ds,ax
        mov     es,ax
        mov     ax,0x9000
        mov     ss,ax
        xor     sp,sp
    

hmm...
No, org 0 (it is default) is right. You can restore linear addressing over 16-bit code.
Code:
  org 0
  ...
  org 0x10000+$    
Post 09 Jul 2010, 07:42
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Madis731



Joined: 25 Sep 2003
Posts: 2139
Location: Estonia
Madis731 13 Jul 2010, 12:39
org back @ 0
64-bit code @0x10000
only 800x600 works "undisturbed" (640x480 okay in Bochs but not QEMU)
paging 4KB => 2MB

Update2:
Fixed to work on real machines (still doesn't work in VMWare)
Automatic 800x600x32BPP detection and boot (easily fixed to selectable)
Fonts and test.bmp out of the source - also fixed the FAT12 builder
(some of the following text is out-of-date)

It seems that LFB doesn't like 4KB pages and would rather eat them with bigger bites Smile Now works on real hardware.

This demo will first list all 24bpp+ modes that are supported. 24/32 usually cannot be chosen and you get what you get. Just accept that sometimes its 24 and sometimes its not Razz
Standard modes are selected with [1], [2], [3] (on your keyboard). There are some exotic ones aswell.

Then it will switch to the mode chosen and:
1) render screen white
2) render screen full of 80x80 24-bit grey blobs
3) draw some rectangles
4) move the first one diagonally across the screen until bottom >= screen.y
5) Then you can move your mouse (yellow rectangle)
the numbers are RDTSC taken to redraw the mouse.

Everything in ring-0 / 64-bit / identity-mappeg 2MB pages - no tasks.


Description: 22.07.2010
Download
Filename: VESA64.7z
Filesize: 27.2 KB
Downloaded: 392 Time(s)

Description: 13.07.2010
Download
Filename: VESA64.7z
Filesize: 26.35 KB
Downloaded: 381 Time(s)


_________________
My updated idol Very Happy http://www.agner.org/optimize/
Post 13 Jul 2010, 12:39
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Madis731



Joined: 25 Sep 2003
Posts: 2139
Location: Estonia
Madis731 31 Aug 2010, 09:48
Update3:
This time there have been quite a few changes:
- it will always start in 800x600 24bpp mode or fail otherwise
* change in Stage2\VESAKR64.asm lines 86 and 91
* it works on QEMU, Bochs and VirtualBox (I use the latter for VT-x)
+ added some mouse icons to differentiate sides and corners
+ move windows with your mouse
+ background BMP is converted to native bitness on startup
* performance advantage on slow CPU/emulator and code size reduction

Update4:
With this update I will only tell that I started logging all my progress in a Features.txt file and you will find everything in there. If there are problems getting it to run, just drop me a line.


Description: 15.11.2010
Download
Filename: VESA64_15.11_resize.7z
Filesize: 32.29 KB
Downloaded: 580 Time(s)

Description: 31.08.2010
Download
Filename: VESA64_31.08.7z
Filesize: 29.85 KB
Downloaded: 400 Time(s)


_________________
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Post 31 Aug 2010, 09:48
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