I am not fully deep inside SSE5, i have no time to study the DREX
byte for 0F 24 / 0F 25, and i cannot encode it manually, at the moment
(if i do not mistake, fasm will support them in 1.70)

Have you sample of dumped bytecode for SSE5 to read, especially for
0F25 ?
According to AMD,

it is to say, my question :
apart from the MODRM, are there other modification to the above instruction len ? (probably NOT)
It is to say, does the DREX byte to modifies/allows more immediates bytes or displacements in the istruction? (probably NOT)

Thanxs in advance,
hopcode

EDIT: forgotten 32bit possibly

DREX merely replaces REX prefix, allows to declare one more XMM register and contains one of two operand configuration bits. So the answer is not and not.

EDIT: mod, move this topic to Main please