the final weeks of fasm 1.67

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Helle

Joined: 24 Feb 2007
Posts: 23
Location: Germany

Helle 28 Apr 2009, 14:30

Hello,
in "ADD r/m64, imm32" gives an (unsigned) value of imm32 >= 80000000h an "error:value out of range" (also "ADD RAX, imm32", and also ADC, AND, CMP, OR, SBB, SUB, XOR; other not tested). I think, a value up to 0FFFFFFFFh is correct. Intel wrote only: "sign-extended to 64-bits", but not a restriction of imm32.
Thanks!
Helle

28 Apr 2009, 14:30

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20461
Location: In your JS exploiting you and your system

revolution 28 Apr 2009, 14:49

You can't have unsigned 64bit values above 0x7fffffff in an imm32 value. This is not an error, there is no way to encode such values in the x86-64 instruction set.

28 Apr 2009, 14:49

MazeGen

Joined: 06 Oct 2003
Posts: 977
Location: Czechoslovakia

MazeGen 28 Apr 2009, 15:22

In other words, opcode 480500000080 means ADD RAX, 0FFFFFFFF80000000h, it is not ADD RAX, (00000000)80000000h.

28 Apr 2009, 15:22

Helle

Joined: 24 Feb 2007
Posts: 23
Location: Germany

Helle 28 Apr 2009, 19:25

Hmm, but the CPU accept this e.g.:

Code:

mov rax,0
dw 0548h
dd 0D0000000h  ;ADD RAX,0D000000h

The result is FFFFFFFFD0000000h, like expected. With the restriction I never get the sign-extension.

Thanks!
Helle

28 Apr 2009, 19:25

LocoDelAssembly
Your code has a bug

Joined: 06 May 2005
Posts: 4624
Location: Argentina

LocoDelAssembly 28 Apr 2009, 21:04

What about:

Code:

xor eax, eax ; 31 C0
add rax, -30000000h ; 48 05 00 00 00 D0

28 Apr 2009, 21:04

Tomasz Grysztar

Joined: 16 Jun 2003
Posts: 8359
Location: Kraków, Poland

Tomasz Grysztar 29 Apr 2009, 06:15

Or:

Code:

add rax, 0FFFFFFFFD0000000h

29 Apr 2009, 06:15

Helle

Joined: 24 Feb 2007
Posts: 23
Location: Germany

Helle 29 Apr 2009, 09:35

Hello,
you are right. It´s for a disassembler-project and I make tests with udis86; this shows ADD RAX,0xD0000000h. I will use your Code, it´s better for eyes and brain Very Happy

!
Solved, sorry and thanks!
Helle

29 Apr 2009, 09:35

LocoDelAssembly
Your code has a bug

Joined: 06 May 2005
Posts: 4624
Location: Argentina

LocoDelAssembly 29 Apr 2009, 14:23

Tomasz Grysztar wrote:

Or:

Code:

add rax, 0FFFFFFFFD0000000h

Because I think that one should also say "value out of range" (also for "alpha = 0FFFFFFFFD0000000h"). Razz

Reason:

Code:

add rax, 0FFFFFFFFD0000000h / 10000h ; add rax, -3000h
add eax, 0FFFFD000h / 10000h         ; add eax, 0FFFFh

add rax, 18446744072904245248 / 65536 ; add rax, -3000h

29 Apr 2009, 14:23

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20461
Location: In your JS exploiting you and your system

revolution 29 Apr 2009, 15:16

See here also.

29 Apr 2009, 15:16

Tomasz Grysztar

Joined: 16 Jun 2003
Posts: 8359
Location: Kraków, Poland

Tomasz Grysztar 29 Apr 2009, 16:32

LocoDelAssembly wrote:

Code:

add rax, 0FFFFFFFFD0000000h / 10000h ; add rax, -3000h
add eax, 0FFFFD000h / 10000h         ; add eax, 0FFFFh

add rax, 18446744072904245248 / 65536 ; add rax, -3000h

That's perfectly correct as long as you know, that in fasm "/" is always equivalent to 64-bit IDIV. The revolution has made a good point there, however adding such sign bit into fasm would not be a quick task (though possible, so I may consider it for some future releases).

29 Apr 2009, 16:32

LocoDelAssembly
Your code has a bug

Joined: 06 May 2005
Posts: 4624
Location: Argentina

LocoDelAssembly 29 Apr 2009, 18:22

Quote:

That's perfectly correct as long as you know, that in fasm "/" is always equivalent to 64-bit IDIV.

Does TFM say that? Wink

But yet, it would be better not do that way as if you decide in the future to extend to 128-bit internal precision (or even arbitrary), you'll be forced to break backward compatibility.

29 Apr 2009, 18:22

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20461
Location: In your JS exploiting you and your system

revolution 29 Apr 2009, 18:26

LocoDelAssembly: 128bit!? Do you think that CPUs will have 128bit arithmetic any time soon? SSE/AVX use 64bit operations.

29 Apr 2009, 18:26

LocoDelAssembly
Your code has a bug

Joined: 06 May 2005
Posts: 4624
Location: Argentina

LocoDelAssembly 29 Apr 2009, 18:34

Quote:

128bit!? Do you think that CPUs will have 128bit arithmetic any time soon?

Absolutely:

Code:

mov ecx, 7
div rcx ; 128-bit dividend

29 Apr 2009, 18:34

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20461
Location: In your JS exploiting you and your system

revolution 29 Apr 2009, 18:45

LocoDelAssembly wrote:

Absolutely:

Code:

mov ecx, 7
div rcx ; 128-bit dividend

Hehe, but not really 128bit is it. In x86-128 ISA you would have "div wcx ;256 bit dividend".

29 Apr 2009, 18:45

Tomasz Grysztar

Joined: 16 Jun 2003
Posts: 8359
Location: Kraków, Poland

Tomasz Grysztar 29 Apr 2009, 20:39

LocoDelAssembly wrote:

But yet, it would be better not do that way as if you decide in the future to extend to 128-bit internal precision (or even arbitrary), you'll be forced to break backward compatibility.

This cannot be done with fasm 1.x architecture.
And the fasm 2 is going to be incompatible with 1.x anyway, so it's not a big deal. Wink

29 Apr 2009, 20:39

comrade

Joined: 16 Jun 2003
Posts: 1150
Location: Russian Federation

comrade 30 Apr 2009, 03:27

Is FASM2 going to be coded in asm? Or in something sane? Smile

30 Apr 2009, 03:27

r22

Joined: 27 Dec 2004
Posts: 805

r22 30 Apr 2009, 20:55

FASM2 should have javascript macros.

That would be fun.

comrade is right! FASM2 should be created in a HEX EDITOR Tomasz has got it way too easy with his mnemonics for machine code Very Happy

30 Apr 2009, 20:55

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