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bitRAKE 05 Mar 2009, 17:04
Seems like a valid target for optimization: How small can the relocation code of an MBR be? The only thing which can be assumed is that the BIOS has loaded a sector of 512 bytes at $7C00. Microsoft's MBR uses only 8086 instructions and requires 27 bytes to copy to $0:600. My current best is 24 bytes, but requires a word of stack space:
Code: ; another byte for 8086 compatibility: xor ax,ax / mov ss,ax push 0 ;286+ pop ss mov sp,$0600 sti cld mov cx,(MBR - Relocation)/2 push sp push ss mov si,Relocation pop es pop di push ss push di rep es movsw retf The boot sector can't really assume CS=0, so it might be advantageous to use the 512 bytes before $7C00? If it's small enough a short jump would be sufficient rather than doing the far return. _________________ ¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup |
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05 Mar 2009, 17:04 |
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revolution 05 Mar 2009, 23:58
bitRAKE wrote: Microsoft puts the stack pointer at $7C00 |
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05 Mar 2009, 23:58 |
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bitRAKE 06 Mar 2009, 01:53
revolution wrote:
_________________ ¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup |
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06 Mar 2009, 01:53 |
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bitRAKE 06 Mar 2009, 03:48
Tomasz Grysztar wrote: Also, you can change the target address simply by changing the jump code. Today at work I was thinking about how to organize the code for FASM to dynamically select the target address, so the code would flow into $7C00 after loading a boot sector - eliminating the need for a branch. Code: cld ; FC sti ; FB xor cx,cx ; 31 C9 mov di,$FFFF ; BF FF FF mov ss,cx ; 8E D1 mov sp,di ; 89 FC mov es,cx ; 8E C1 mov si,$FFFF ; BE FF FF mov cl,$FF ; B1 FF rep es movsw ; F3 26 A5 jmp $-126 ; EB 80 Code: xor cx,cx ; 31 C9 mov ds,cx ; 8E D9 mov si,Relocation-4 ; BE 14 7C les di,[si] ; C4 3C ; lss sp,[si] ; 0F B2 24 mov ss,cx ; 8E D1 mov sp,di ; 89 FC sti ; FB cld ; FC mov cl,(MBR-(Relocation-4))/2 ; B1 D5 rep movsw ; F3 A5 jmp 0:600h ; EA 00 06 00 00 Code: .found: mov cx,si .skip: add si,16 .entry: shl byte [si],1 jne .done jnc .skip ; found an active entry, save only if CX zero and insure others are valid jcxz .found ; only one entry can be active .mbr_invalid: ; error code one mov cx,1 .none_active: ; error code zero jmp .error .done: jcxz .none_active ; proper exit occurs at end of partition table ; otherwise an invalid entry caused an early exit cmp si,$1FE jne .mbr_invalid _________________ ¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup Last edited by bitRAKE on 06 Mar 2009, 04:16; edited 1 time in total |
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06 Mar 2009, 03:48 |
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sinsi 06 Mar 2009, 04:02
For the smallest relocation code, why bother setting up a stack? Just ensure interrupts are off with cli and save yourself 4 bytes.
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06 Mar 2009, 04:02 |
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bitRAKE 06 Mar 2009, 04:22
Maybe, I've assumed in error, but my guide has been the other MBRs and my experience with register values from BIOS. Two machines have put the stack pointer at $400 - which is not good when the INT 13h's use a lot of stack space. Some INT 13h's require interrupts to be enabled, iirc. So, then the question becomes where is it best (in terms of size) to set these registers/flags. True it isn't required for relocation.
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06 Mar 2009, 04:22 |
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Tomasz Grysztar 06 Mar 2009, 04:24
bitRAKE wrote: Something like F8 05 00 00 works because it disassembles to CLC/ADD AX,0. So why not FB 05 00 00, and you can get rid of STI in relocation code. |
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06 Mar 2009, 04:24 |
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bitRAKE 06 Mar 2009, 04:33
Tomasz Grysztar wrote:
sinsi, If we look at it from that perspective - there isn't a need to relocate until much later in the process, and we could copy fewer bytes still. Only when we are certain a valid partition has been found the sector loader could be moved somewhere (on the stack even). Certainly an avenue to try optimization on. _________________ ¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup |
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06 Mar 2009, 04:33 |
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Tomasz Grysztar 06 Mar 2009, 04:40
bitRAKE wrote:
Oh, right, I don't know how did I think that B is even digit. But if we decided to not setup stack at all, then it might work. On second thought... does an odd stack address cause any problems in real mode? |
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06 Mar 2009, 04:40 |
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bitRAKE 06 Mar 2009, 04:54
Tomasz Grysztar wrote: On second thought... does an odd stack address cause any problems in real mode? Quote: In the real-address mode, if the ESP or SP register is 1 when the PUSH instruction is executed, an #SS exception is generated but not delivered (the stack error reported prevents #SS delivery). Next, the processor generates a #DF exception and enters a shutdown state as described in the #DF discussion in Chapter 5 of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A. _________________ ¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup Last edited by bitRAKE on 06 Mar 2009, 05:09; edited 1 time in total |
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06 Mar 2009, 04:54 |
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Tomasz Grysztar 06 Mar 2009, 04:56
When your SP goes down to 1, then you're already in lots of trouble, since you're overwriting IDT.
EDIT: revolution, we think in parallel. Last edited by Tomasz Grysztar on 06 Mar 2009, 04:58; edited 3 times in total |
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06 Mar 2009, 04:56 |
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revolution 06 Mar 2009, 04:57
But who sets SP to 1? Even coming to 1 from a higher value is going to overwrite your INT table. Somehow I don't think it will be such a big problem.
[edit]Tomasz beat me to it![/edit] |
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06 Mar 2009, 04:57 |
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Tomasz Grysztar 06 Mar 2009, 05:02
Or you can jump to 0:0BCFBh and have stack evened this way.
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06 Mar 2009, 05:02 |
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sinsi 06 Mar 2009, 05:03
bitRAKE: From the title and your first lot of code the very first thing was relocation. Changing the goalposts?
I think that relocation first up is the thing to do, because if you don't find an active partition you basically stop - "Missing operating system". Odd stack addresses happen all the time - e.g. if a local is a buffer 11 bytes long, although I imagine compilers would even it out. |
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06 Mar 2009, 05:03 |
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bitRAKE 06 Mar 2009, 05:34
Well, I did mention in the first post that additional code was coming...not that any defense is needed - it's clearly about MBR size optimization that hasn't changed. All the posts have been very productive in that direction.
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06 Mar 2009, 05:34 |
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revolution 06 Mar 2009, 05:40
Tomasz Grysztar wrote: Or you can jump to 0:0BCFBh and have stack evened this way. Code: mov sp,di ; 89 FC sti ; FB Code: mov ss,sp |
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06 Mar 2009, 05:40 |
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bitRAKE 06 Mar 2009, 05:43
Would interrupts be a problem? A real problem - not the unaligned stack kind of problem.
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06 Mar 2009, 05:43 |
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revolution 06 Mar 2009, 05:48
What sort of problem are you thinking of?
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06 Mar 2009, 05:48 |
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bitRAKE 06 Mar 2009, 05:53
sti
mov sp,0 ; could something be written to SS:SP here? ; at this point we don't know what SS is. mov ss,sp |
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06 Mar 2009, 05:53 |
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