flat assembler
Message board for the users of flat assembler.
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MazeGen
I'm looking for a mnemonic which allows 14-byte FSTENV operand in FASM under use32 (the default is 28-byte operand). I don't want to hardcode it.
The manual doesn't mention this possibility. And FSTENVW doesn't work. I use 1.67.29. |
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MazeGen
Check it once again:
Quote: The manner in which this information is stored in memory depends on the operating Or use a debugger. |
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MazeGen
revolution wrote: I thought the mem14 structure was only for 16bit code. Is it not so that if you are in 32bit mode the structure is always mem28? Check it once again. It is operand size attribute, not address attribute. |
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MazeGen
Too quick fingers, revolution?
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revolution
Yeah, my fuskup there, I edited my edit. Sorry for the confusion.
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MazeGen
BTW, the same apply for FLDENV m14/28, FnSAVE m94/108, and FRSTOR m94/108.
(FXSAVE and FXRSTOR have fixed m512 operand in all modes) |
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revolution
I guess a macro or equ will be needed. Since Intel have not defined any special opcodes for these situations it doesn't seem appropriate to define our own. And this situation is quite rare so it also doesn't really rate as urgent.
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MazeGen
FASM (and other assemblers) already defines its own mnemonics to indicate implicate operand size (doesn't "opcode" refer to a "machine operation code" rather than to "mnemonic"?):
loopw/loopd, loopew/looped/loopzw/loopzd, loopnew/loopned/loopnzw/loopnzd, int3, pushw/pushd, popw/popd, pushfw/popfw, pushaw, aam (with operand), aad (with operand). |
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MazeGen
And yes, it is not urgent, I was just wondering how would FASM encode them
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Tomasz Grysztar
Yes, I think the FSTENVW would be the way to go.
I need to investigate why I didn't implement it in the past - I recall there was some strange reason, but I don't remember right now. |
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revolution
MazeGen wrote: loopw/loopd, loopew/looped/loopzw/loopzd, loopnew/loopned/loopnzw/loopnzd, int3, pushw/pushd, popw/popd, pushfw/popfw, pushaw, aam (with operand), aad (with operand). |
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MazeGen
Tomasz Grysztar wrote: Yes, I think the FSTENVW would be the way to go. Just be careful with encodings. FSTENVW must be encoded as 9B66D9/6 instead of 669BD9/6. |
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revolution
MazeGen wrote: Just be careful with encodings. FSTENVW must be encoded as 9B66D9/6 instead of 669BD9/6. |
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baldr
MazeGen,
Should future OSes seriously consider emulation of invalid in 64-bit mode opcodes? I'm talking about aaa/…/das family. Converting nibble to hex char using six byte code was so convenient (it even set CF for 0…9)… |
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MazeGen
These instructions are not really neccessary and that's probably why they were removed. And the emulation would be pretty slow.
On x64 Windows, only LAHF and SAHF are emulated because they are not supported on early steppings of EM64T architecture:
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MazeGen
Tomasz Grysztar wrote: Yes, I think the FSTENVW would be the way to go. Any progress, Tomasz? I plan to investige also other assemblers so it would be good to know how you're gonna implement FnSTENV and the others. |
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Tomasz Grysztar
It's added in 1.67.30.
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MazeGen
WHATSNEW.TXT wrote: [+] Added FSTENVW/FSTENVD/FSAVEW/FSAVED mnemonics. Good work, however, FASM still complains about the following: Code: FNSTENVW [eax] FNSTENVD [eax] FRSTORW [eax] FRSTORD [eax] |
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Tomasz Grysztar
It seems I forgot about them.
![]() For a quick fix before the next release you can add these items to "instructions_7" table: Code: db 'frstord',4 dw fnsave_instruction_32bit-assembler db 'frstorw',4 dw fnsave_instruction_16bit-assembler And these to "instructions_8": Code: db 'fnstenvd',6 dw fldenv_instruction_32bit-assembler db 'fnstenvw',6 dw fldenv_instruction_16bit-assembler |
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