Directly from realmode to longmode

Index > OS Construction > Directly from realmode to longmode

Goto page 1, 2 Next

Author

Thread

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 26 May 2008, 02:17

I'm just starting to play with 64-bit and long mode and was wondering if there's any problem with going straight to long mode without the protected mode part. The code in the attachment works in qemu and a real computer booting from a floppy.

Description:		Download
Filename:	my64.asm
Filesize:	3.2 KB
Downloaded:	540 Time(s)

26 May 2008, 02:17

Feryno

Joined: 23 Mar 2005
Posts: 514
Location: Czech republic, Slovak republic

Feryno 26 May 2008, 13:56

well done !!!
you skipped 32-bit protected mode part, you constructed TLB structures in 16-bit real mode and directly jumped from 16-bit into 64-bit. Tomasz demo has redundant 32-bit protected mode part just for constructing TLB structures, you did it without it. Nice!

just something a bit out of topic:
Long mode is not possible without protected mode CR0.PE (bit 0. of CR0) must be set as well paging CR0.PG (bit 31.) must be set.
There is an amazing possiblity of CR0.PE=0 and CR0.PG=1 under AMD64 virtualization - Paged real mode)

26 May 2008, 13:56

vid
Verbosity in development

Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia

vid 26 May 2008, 21:06

errm... "TLB" is not right term here i quess. Translation Lookaside *Buffers* are filled by processor from paging structures. Sorry if I am wrong.

Anyway, great job! Much appreacieted.

26 May 2008, 21:06

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 27 May 2008, 01:34

I can't really take any credit, since I used the longmode example by Tomasz and a few hints from http://www.osdev.org/phpBB2/viewtopic.php?t=11093

Does anyone know of any example code to switch CPU's on and off? I'm getting a headache reading the Intel manual. Sad

27 May 2008, 01:34

Feryno

Joined: 23 Mar 2005
Posts: 514
Location: Czech republic, Slovak republic

Feryno 27 May 2008, 07:01

to vid: you right!

to sinsi:
1. do you mean putting CPU into power save mode?
2. or just to halt CPU not to consume so much energy and keep its temperature low - e.g. something like when task manager shows your CPU usage about 2% and not 100% (HLT instruction in kernel, CPU is then woken up at every interrupt - so e.g. about 100 times per second depending on timer interrupt settings and if there is no task to execute, then do HLT instruction again)

16 bit real mode sample using int 15h for shutting system down just like pressing power off button - ripped 7 years ago from win.com file of win 95 - not very usefull because then you have to go from long mode back into real mode to execute this, but may help you:

Quote:

; Advanced Power Management Specification - INSTALLATION CHECK
mov ax,5300h
xor bx,bx ; device id = 0 for system BIOS
int 15h ; search for APM
jc no_PM
cmp bx,'PM' ; 504Dh = 'PM'
jnz no_PM
cmp ax,0101h ; search version 1.1 (AH major AL minor)
jc no_PM ; no APM v. 1.1 or higher

push cx ; push flags returned by int15h/ax=5300h

; Advanced Power Management Specification - CONNECT REAL-MODE INTERFACE
mov ax,5301h
xor bx,bx ; device id = 0 for system BIOS
int 15h

; Advanced Power Management v1.1 - DRIVER VERSION
mov ax,530Eh
xor bx,bx ; device id = 0 for system BIOS
mov cx,0101h ; v 1.1
int 15h

; Advanced Power Management v1.1 - ENGAGE/DISENGAGE POWER MANAGEMENT
mov ax,530Fh
mov bx,0001h ; device id = 1 for all devices for which the system BIOS manages power
mov cx,bx ; cx=1 ENGAGE , cx=0 DISENGAGE
int 15h

; Advanced Power Management Spec - ENABLE/DISABLE POWER MANAGEMENT
mov ax,5308h
mov bx,0001h ; device id = 1 for all devices for which the system BIOS manages power
mov cx,bx ; new state: 1 enabled , 0 disabled
int 15h

; Advanced Power Management Specification - SYSTEM POWER STATE
mov ax,5307h
mov bx,0001h ; device id = 1 for all devices for which the system BIOS manages power
mov cx,0003h ; system state ID
; 0000h ready
; 0001h stand-by
; 0002h suspend
; 0003h off
int 15h ; this power off ATX comp

; next executes only if power off process failed
pop cx ; flags

test cl,00001000b
jz ndbpm ; BIOS power management disabled

push cx
mov ax,5308h
mov bx,0001h
xor cx,cx
int 15h ; DISABLE POWER MANAGEMENT
pop cx

ndbpm: test cl,00010000b
je ndgpm ; BIOS power management disengaged (APM v1.1)

mov ax,530Fh
mov bx,0001h
xor cx,cx
int 15h ; DISENGAGE POWER MANAGEMENT

ndgpm:

; Advanced Power Management Specification - DISCONNECT INTERFACE
mov ax,5304h
xor bx,bx
int 15h

no_PM: ret

27 May 2008, 07:01

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 27 May 2008, 07:18

no, no, no - switching multiprocessor/multi-core CPU's on and off.

27 May 2008, 07:18

Feryno

Joined: 23 Mar 2005
Posts: 514
Location: Czech republic, Slovak republic

Feryno 27 May 2008, 13:06

then I suggest you to read the linux kernel sources http://kernel.org/ to study how a bootstrap CPU initializes other CPUs in the system

27 May 2008, 13:06

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 27 May 2008, 16:28

What I've understood first you need to boot up as normal, then wake the other processors. The first up is called BSP (bootstrap processor) whichever it is and all others (no matter how many) are called AP (application processors).
All I've done is booted it in SMP mode (where all CPUs are equal in specs). Actually all the info you need is in the MP 1.4 document. There are some samples there. I managed to fit it all in 512 bytes, but then I got greedy and needed more Very Happy

graphics and stuff to see what I had done Razz

It still doesn't work in MenuetOS (I don't know why - hangs), but it works solely. There are a lot of things missing I reckon: semaphore/locking system, "the right" way of managing pages and memory etc.

27 May 2008, 16:28

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 28 May 2008, 06:03

Feryno wrote:

then I suggest you to read the linux kernel sources http://kernel.org/ to study how a bootstrap CPU initializes other CPUs in the system

Thanks, but with 253MB of source files, I don't know where to start (and I don't know C at all Sad

).

Madis731: I followed the BSP/AP thing, but couldn't figure out the code to enable the other CPU's. Oh well, I will plough through the spec and hope the examples make sense (I didn't get that far through it heh heh). Thanks mate.

28 May 2008, 06:03

Japheth

Joined: 26 Oct 2004
Posts: 151

Japheth 28 May 2008, 08:29

sinsi wrote:

Madis731: I followed the BSP/AP thing, but couldn't figure out the code to enable the other CPU's. Oh well, I will plough through the spec and hope the examples make sense (I didn't get that far through it heh heh). Thanks mate.

Someone who is interested to have multi-core support implemented in hx has sent me these documents:

http://www.japheth.de/hx/how_to_bring_smp.html
http://www.japheth.de/hx/smp.c
http://www.japheth.de/hx/smp.h

He also transfered the source code to 16-bit pascal and wrote a small sample to demonstate that it works. I don't own the copyright, so I cannot post the sample, but I can confirm that the code "works".

28 May 2008, 08:29

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 28 May 2008, 12:34

I can post my ASM sample, when I get to work (where my other laptop resides). It also works, but it is too simple to be implemented in an OS. It lacks communication through IPIs between CPUs.

28 May 2008, 12:34

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 29 May 2008, 07:24

Okay, its not much commented, but if you've researched the subject, you'll get the gist Smile

Result should be CPU cores toggling blue and yellow. Works even under real machines Very Happy

Description:	os-test.iso is a stub. The compiled _MP_.asm goes inside that CD-image and then you can run it with QEMU. Its meant to be one folder below QEMU root.	Download
Filename:	MP_Folder.7z
Filesize:	13.88 KB
Downloaded:	490 Time(s)

_________________
My updated idol Very Happy

http://www.agner.org/optimize/

29 May 2008, 07:24

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 30 May 2008, 05:04

Many thanks, it is becoming clearer now - all that is needed is to tie in 64-bit code as well Laughing

(I am joking here, OK?)

Just a question, what are 'VABA' and 'LOENDUR' in english? I can sort of figure it out from context, but was wondering...

Quote:

Result should be CPU cores toggling blue and yellow.

Toggling at a million miles per second - I swear it looks green Smile

30 May 2008, 05:04

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 30 May 2008, 06:48

VABA="free" (oh the joy of great times, when I coded in native language)
LOENDUR="counter"
...and yes, they are pretty obvious: VABA is 0 or 1; LOENDUR is 1 or greater Smile

Most probably they ought to be called:

Code:

I_AM_AN_AP = [0 | 1]
CPU_COUNT = [1 .. MAX_CPU]

Btw, the toggling is great under QEMU, but you need to set the delays longer for real machines (or make them constant across systems ~10ms or so) Very Happy

Anyhow I tried merging these two codes, but I'm not very "at home" with the orgs so I wasn't able to correct it. I know that when org 10000h is set, then everything regarding to addresses in 16-bit must be biased by -10000h like this:

Code:

org 10000h
;.. more CODE 
mov ax,1234h
jmp $-10000h ; make infinite loop to test in QEMU debugger
;..

But somehow the jump to 64-bit mode gets confused or maybe I get confused Smile

Last edited by Madis731 on 30 May 2008, 07:35; edited 1 time in total

30 May 2008, 06:48

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 30 May 2008, 07:24

You also need to load your code at 10000h...I don't understand this bit:

Code:

  jmp $-10000h ; make infinite loop to test in QEMU debugger

Quote:

Anyhow I tried merging these two code

Which two?

30 May 2008, 07:24

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 30 May 2008, 07:30

My64.asm (that you gave) and mine (_MP_.asm) - I tried merging these two.

The problem with this offset is that when you load from a floppy, you get a 7xxx address or something, but when I use this CD-image, it becomes 10000h. Under 16-bit mode you can't address more than 0FFFFh of course to when our IP is at 1003Eh and you do a JMP $ then you end up in an error in FASM. What you need to do is JMP $-10000h so you get JMP 1003Eh-10000h which is 3Eh.

30 May 2008, 07:30

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 05 Jun 2008, 09:00

OK, got 4 cores "doin' their thang" - code is absolute sh*t hack, so no posting here... Very Happy

.
I will clean it up if anyone wants, but it is 'vertical' i.e. it works on mine...

Totally off-topic, but has anyone tried the VBE3 protected-mode stuff?
I realise that it's 16-bit PM (although vbe3.pdf seems to throw around "32-bit" a lot), but mixing 16/32 is OK, so what about 16/32/64bit?
Looks like you can change modes from PM and do all INT 10 stuff that pertains to VESA (4Fxx stuff) - a quick disasm of my video BIOS seems to agree.
(This is not the VBE2 pmode stuff, this seems to be a full-on VESA interface).
Apart from OS installers, can this be of any use to anyone besides us?

Madis731:the order that you do things is important (e.g. enabling longmode does nothing until you enable paging - this is why you cannot avoid paging in longmode) well, that is my reading from the intel manuals.

05 Jun 2008, 09:00

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20430
Location: In your JS exploiting you and your system

revolution 05 Jun 2008, 09:10

sinsi wrote:

... so what about 16/32/64bit? ...

Technically possible but ugly since 64bit (long) mode doesn't allow 16bit tasks. You have to jump back and forth between 64bit and 32bit modes each time the 16bit task is pre-empted and re-run. It would be a huge interrupt overhead. AFAIK no one has even bothered to do this sort of mode switching, preferring instead to use an emulator for the 16bit tasks within the 64bit mode.

05 Jun 2008, 09:10

sinsi

Joined: 10 Aug 2007
Posts: 794
Location: Adelaide

sinsi 05 Jun 2008, 09:40

revolution wrote:

You have to jump back and forth between 64bit and 32bit modes each time the 16bit task is pre-empted and re-run.

Surely not - it needs 16-bit PM, but swapping between 16/32/64 PM code is simply changing descriptors and a jump...no INTs are used, since you copy the BIOS code and CALL an entry-point. Anyway, you wouldn't be calling it all the time - only on a video mode change.

05 Jun 2008, 09:40

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20430
Location: In your JS exploiting you and your system

revolution 05 Jun 2008, 12:39

sinsi wrote:

Surely not - it needs 16-bit PM, but swapping between 16/32/64 PM code is simply changing descriptors and a jump...no INTs are used, since you copy the BIOS code and CALL an entry-point. Anyway, you wouldn't be calling it all the time - only on a video mode change.

But then you have to duplicate all you drivers into both 32/16bit code and 64bit code.

What happens when you move your mouse and you get an interrupt? You will have to change to a mode that your driver needs, and then back to the mode that your task needs. It sounds simple to set a descriptor, but internally the CPU has a large overhead when doing all the switching and interrupts and things.

05 Jun 2008, 12:39

Goto page 1, 2 Next

< Last Thread | Next Thread >

Forum Rules:

You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum
You cannot attach files in this forum
You can download files in this forum