flat assembler
Message board for the users of flat assembler.
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revolution
Use fcomi.
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MazeGen
I wonder what version of FASM are you using? Both 1.67.21 and 1.67.29 (newest) accepts SAHF and LAHF.
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vid
BTW, don't forget that when comparing two FP numbers which are product of some computation, you should compare with some margin, eg:
if num1-margin < num2 < num1+margin then numbers are equal. Of course this may not always apply, but mostly it does |
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baldr
MazeGen,
They do accept, but… Intel SDM wrote: This instruction executes as described above in compatibility mode and legacy mode. It is valid in 64-bit mode only if CPUID.80000001H:ECX.LAHF-SAHF[bit 0] = 1. |
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MazeGen
barld: yes (and ref.x86asm.net/coder64.html says the same) but only early steppings of EM64T architecture don't support LAHF and SAHF and as long as we can't set some "100%-64-bit-compatibility" option in FASM, LAHF and SAHF should be enabled.
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mehble
i used fcomi instead... thanks revolution.
Code: I wonder what version of FASM are you using? Both 1.67.21 and 1.67.29 (newest) accepts SAHF and LAHF. Fasm does allow it to assembler (SAHF and LAHF)... no problems. But if you run it through a debugger for example fdbg001B it will still come up as an illegal instruction and hence the program will just skip over it. |
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baldr
mehble,
FDBG decode 0x9E as "illegal sahf" but F7/F8 doesn't generate #UD fault and sahf works as specified? Probably FDBG's authors should check aforementioned CPUID flag… MazeGen wrote: …barld… ![]() |
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Feryno
thanks guys, I'll update that in fdbg
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Plue
Use TEST ah,condition_bitmask.
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Feryno
Hi, I implemented the checking of LAHF / SAHF instructions support into fdbg so now it doesn't output such confusing informations.
http://board.flatassembler.net/topic.php?p=85361#85361 |
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