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> Main > REX.W needed with REP prefix to use RDI/RCX? |
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bitRAKE 13 Nov 2008, 05:19
Intel manuals state ECX/EDI are used by default for all string instructions except INS/OUTS, but I've tested and found the full 64-bits of RCX/RDI are used even without REX.W prefix. FASM doesn't emit the REX.W prefix - has this already been tested/confirmed? A google didn't turn up anything on this.
Vol.2B 4-334 Quote: In 64-bit mode, default operand size is 32 bits. The default count register is RCX for REP INS and REP OUTS; it is ECX for other instructions. REX.W does not promote operation to 64-bit for REP INS and REP OUTS. However, using a REX prefix in the form of REX.W does promote operation to 64-bit operands for other REP/REPNE/REPZ/REPNZ instructions. http://download.intel.com/design/processor/manuals/253667.pdf _________________ ¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup |
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13 Nov 2008, 05:19 |
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Tomasz Grysztar 13 Nov 2008, 08:47
In the past the size of REP coutner always depended on the size of address used by string instruction, I suspect this is also the case.
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13 Nov 2008, 08:47 |
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bitRAKE 13 Nov 2008, 17:01
Code: mov rcx,0 mov rdx,$1000 mov r8,MEM_COMMIT or MEM_RESERVE or MEM_TOP_DOWN mov r9,PAGE_EXECUTE_READWRITE call [VirtualAlloc] xchg rdi,rax mov al,0 mov rcx,-1 ; clears high dwords of RCX/RDI ; access violation repz stos byte [edi] ; uses full 64-bit registers RCX/RDI repz stos byte [rdi] ; uses full 64-bit registers RCX/RDI repz db $48 stosb |
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13 Nov 2008, 17:01 |
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Tomasz Grysztar 13 Nov 2008, 17:14
Well, it may be that "rep stos byte [edi]" uses ECX, but the general rule that any instruction that modifies 32-bit general register, clears the uppers 32 bits of 64-bit one, is also applied here.
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13 Nov 2008, 17:14 |
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bitRAKE 13 Nov 2008, 19:03
I was attempting to show the danger Feryno referred to. All the instructions work as I expected them to - the manual explaination really seemed strange when I first read it. I still wonder if it applies to some processor - seems they went out of their way to describe this odd behaviour.
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13 Nov 2008, 19:03 |
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baldr 13 Nov 2008, 19:15
bitRAKE,
That's why I stick with IA-32 for ifasm development (instant fasm with IDE, each line gets interpreted as you leave it).  |
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13 Nov 2008, 19:15 |
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MazeGen 14 Nov 2008, 08:29
bitRAKE, as for 64-bit mode, Intel manuals are often misleading and contradic itself. I found this while designing the 64-bit part of my reference. For example, even the REP prefix family description contains two different explanation on ECX vs. RCX use:
Quote: Count register is CX, ECX or RCX by default, depending on attributes of the operating modes. In 64-bit mode, if default operation size is 32 bits, the count register becomes RCX when a REX.W prefix is used. Quote: Operation: I always consult the AMD manual as well in such a doubtful cases: Quote: 1.2.6 Repeat Prefixes bitRAKE wrote: Maybe REX.W has an effect in compatiblity mode? Not something I'll test at the moment. |
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14 Nov 2008, 08:29 |
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asmfan 14 Nov 2008, 12:41
Instructions that REP prepends need REX.W to use 8-byte operand(s) so i guess this is the case for rcx is used as intel manuals say. see 4-344 vol.2B last paragraph. it explains everithing. every string instruction with *Q at the end implys rex.w and rcx user under 64. if other than *Q no rex.w and only ecx as operand.
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14 Nov 2008, 12:41 |
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Tomasz Grysztar 14 Nov 2008, 13:19
MazeGen wrote: I always consult the AMD manual as well in such a doubtful cases: Right, I also stick to AMD manual when it comes to 64-bit things. First - they are the original, and were much earlier (I still have a printed version that calls the architecture x86-64, which they later changed to AMD64, and at the time I was implementing it into fasm, Intel was only starting to release some information about IA-32e [later called EM64T]). Second - the Intel IA-32e manuals were just a barefaced ripoff from AMD's. I recall that when I looked at their first versions, they even had some mistakes copied directly from AMD64 manuals. |
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14 Nov 2008, 13:19 |
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MazeGen 14 Nov 2008, 13:45
asmfan wrote: every string instruction with *Q at the end implys rex.w and rcx user under 64. if other than *Q no rex.w and only ecx as operand. This is again wrong. *Q string instruction doesn't imply RCX. RCX is always implied unless you specify 32-bit address size of operand to be moved to/from/between memory: Code: rep stos qword [rdi] ; counter is RCX rep stos qword [edi] ; counter is ECX In other words, the size of rCX is independent of the size of operand to be moved. Yes, pretty confusing, but the same works for JRCXZ. Prefix 67 (normally memory-size override) changes this instruction to JECXZ. Prefix 66 (operand-size override) doesn't change the size of rCX, it truncates target address to 32-bits (from RIP to EIP). |
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14 Nov 2008, 13:45 |
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asmfan 14 Nov 2008, 15:16
both this code use REX.W prefix. I tend to think that *CX register is operand-oriented not address-oriented.
i just had a look at 3.6.1 Operand Size and Address Size in 64-bit Mode of Intel manual pt.1 it says if REX.W is present operand is always 64bit if any other override prefixes is used. The same on REP description in pt. 2B of same manuals. Once again what makes you think so that *CX is size address oriented not operand? |
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14 Nov 2008, 15:16 |
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MazeGen 14 Nov 2008, 15:24
Intel manuals are wrong. See my quote from AMD manual above.
The size of *CX depends on prefix 0x67 for REP/LOOP/J*CXZ since 386 processor. So it is now. REX.W doesn't have influence on the *CX size. |
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14 Nov 2008, 15:24 |
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asmfan 14 Nov 2008, 15:51
yup, found proof for your words on amd manual also:
1.2.3 Address-Size Override Prefix The prefix changes the address size for memory operands. It also changes the size of the RCX register for instructions that use RCX implicitly. it is about 67h as you said. |
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14 Nov 2008, 15:51 |
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