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kandamun



Joined: 20 Jul 2005
Posts: 25
kandamun 19 Feb 2008, 16:52
Hello all
Is there an instruction that adds two 128 bit numbers with carry?
I thought SSEx should have one but I could not find it.
And what is the most number of bits that can be ADDED with one instruction (with carry set)?
Post 19 Feb 2008, 16:52
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Borsuc



Joined: 29 Dec 2005
Posts: 2465
Location: Bucharest, Romania
Borsuc 19 Feb 2008, 16:57
kandamun wrote:
Hello all
Is there an instruction that adds two 128 bit numbers with carry?
You need two 64-bit adds, or four 32-bit adds, obviously to form a 128-bit add in both cases...

see Working with Big Numbers thread.

kandamun wrote:
And what is the most number of bits that can be ADDED with one instruction (with carry set)?
Infinite Very Happy

as long as it fits in memory/RAM
Post 19 Feb 2008, 16:57
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kandamun



Joined: 20 Jul 2005
Posts: 25
kandamun 19 Feb 2008, 18:55
Thanks.
I know how to use 32-bit - add / adc .
But when there are 128 registers why isn't there 128 bit add instruction ?
Post 19 Feb 2008, 18:55
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r22



Joined: 27 Dec 2004
Posts: 805
r22 19 Feb 2008, 20:09
kandamun wrote:
Thanks.
I know how to use 32-bit - add / adc .
But when there are 128 registers why isn't there 128 bit add instruction ?


The 128bit registers are part of SSE.
SSE stands for Streaming SIMD Extensions.
SIMD stands for Single Instruction Multiple Data.
Post 19 Feb 2008, 20:09
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 19872
Location: In your JS exploiting you and your system
revolution 20 Feb 2008, 02:32
kandamun wrote:
Thanks.
I know how to use 32-bit - add / adc .
But when there are 128 registers why isn't there 128 bit add instruction ?
The registers are split into smaller parts, 64/32/16/8 bits, there is no instruction (yet) to work with all 128 bits as a single number. The MD part of SIMD implies that there is not just one piece of data in the register.
Post 20 Feb 2008, 02:32
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daniel.lewis



Joined: 28 Jan 2008
Posts: 92
daniel.lewis 21 Feb 2008, 06:34
Hmm... I should research to see if anyone has concieved of a parallelize-able lexer.
Post 21 Feb 2008, 06:34
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