Index
> Macroinstructions > Automatic size optimization |
| Author |
|
|
rCX 18 Jul 2008, 01:01
Thats a good idea. Here are a few I use (in 16 bits)
Code: macro mov op1,op2 { if ( op1 in <ds,es,ss> & ( (op2 in <cs,ds,es,ss>)|(op2 eqtype 1)) ) ;ex. "mov es,ds" or "mov es,0xA000" push word op2 pop word op1 else if ((op1 eqtype word [si])) & ((op2 eqtype word [si])) ;ex. "mov word [si],word [di]"; can not be bytes push op2 pop op1 else mov op1,op2 end if } Code: macro xchg op1,op2 { if (op1 eqtype word [si]) & (op2 eqtype word [si]) ;ex. xchg word [si],word [di] push op1 push op2 pop op1 pop op2 else xchg op1,op2 end if } |
|||
18 Jul 2008, 01:01 |
|
|
Grom PE 18 Jul 2008, 01:05
rCX, but that's extending syntax, not optimizing?
|
|||
|
18 Jul 2008, 01:05 |
|
|
LocoDelAssembly 18 Jul 2008, 01:37
There is a thread about this already but unfortunately I can't find it... If someone found it I would like to merge this thread into the old one.
|
|||
|
18 Jul 2008, 01:37 |
|
|
rCX 18 Jul 2008, 01:54
Grom PE wrote: rCX, but that's extending syntax, not optimizing? Yeah your probably right. But it does make my life a little easier  |
|||
|
18 Jul 2008, 01:54 |
|
|
revolution 18 Jul 2008, 03:39
LocoDelAssembly wrote: There is a thread about this already but unfortunately I can't find it... If someone found it I would like to merge this thread into the old one. |
|||
|
18 Jul 2008, 03:39 |
|
|
LocoDelAssembly 18 Jul 2008, 03:50
Yes, that one but seems to be a mess, it is glued with many discussion about how the fasm's code generation should be so it would be better that each author re-posts its working macros here...
Thanks for finding it revolution. |
|||
|
18 Jul 2008, 03:50 |
|
|
revolution 18 Jul 2008, 04:08
LEA size optimisation:
Code: macro lea [stuff] { common local b1,b2,b3,address address equ match reg=,[addr],stuff\{address equ addr\} match reg=,size[addr],stuff\{address equ addr\} match reg=,size =ptr addr,stuff\{address equ addr\} virtual b1=0 b2=0 leA stuff if ($-$$)=2 load b1 byte from $$ load b2 byte from $$+1 else if ($-$$)=3 load b1 byte from $$ load b2 byte from $$+1 load b3 byte from $$+2 if ~(b1=8dh & (b2 and 307o)=004o & b3=24h) & \ ;lea reg,[esp] ~(b1=8dh & (b2 and 307o)=105o & b3=00h) ;lea reg,[ebp] b1=0 end if else if ($-$$)=6 & ~address eq load b1 byte from $$ load b2 byte from $$+1 if b1=8dh & (b2 and 307o)=005o ;lea reg,[immediate] b1=100h else b1=0 end if end if end virtual if b1=08dh if ~((b2 and 7o)=((b2 and 70o) shr 3)) db 08bh,b2 or 300o else ;do nothing end if else if b1=100h db 0b8h or ((b2 and 70o) shr 3) dd address else leA stuff end if } TEST size optimisation: Code: macro test op,val { local address,opcode,length,start start=$ address equ match [addr], op \{ address equ addr \} match size [addr], op \{ address equ addr \} match size =ptr addr, op \{ address equ addr \} if val eqtype 0 virtual at 0 test op,val length=$-$$ repeat $ load opcode byte from %-1 if opcode <> 66h & opcode <> 67h & \ opcode <> 64h & opcode <> 65h & \ opcode <> 26h & opcode <> 2eh & \ opcode <> 36h & opcode <> 3eh break end if end repeat end virtual if opcode = 0F7h & ~ address eq if val = (val) and 7Fh test byte [address],val else if val = (val) and 7F00h test byte [address+1],(val) shr 8 else if val = (val) and 7F0000h test byte [address+2],(val) shr 16 else if val = (val) and 0FF000000h test byte [address+3],(val) shr 24 else if val = (val) and 07FFFh test word [address],val else if val = (val) and 07FFF00h test word [address+1],(val) shr 8 else if val = (val) and 0FFFF0000h test word [address+2],(val) shr 16 else test op,val end if else if op eq eax & val = (val) and 7Fh test al,val else if op eq eax & val = (val) and 7F00h test ah,(val) shr 8 else if op eq ebx & val = (val) and 7Fh test bl,val else if op eq ebx & val = (val) and 7F00h test bh,(val) shr 8 else if op eq ecx & val = (val) and 7Fh test cl,val else if op eq ecx & val = (val) and 7F00h test ch,(val) shr 8 else if op eq edx & val = (val) and 7Fh test dl,val else if op eq edx & val = (val) and 7F00h test dh,(val) shr 8 else if op eq ax & val = (val) and 7Fh test al,val else if op eq ax & val = (val) and 0FF00h test ah,(val) shr 8 else if op eq bx & val = (val) and 7Fh test bl,val else if op eq bx & val = (val) and 0FF00h test bh,(val) shr 8 else if op eq cx & val = (val) and 7Fh test cl,val else if op eq cx & val = (val) and 0FF00h test ch,(val) shr 8 else if op eq dx & val = (val) and 7Fh test dl,val else if op eq dx & val = (val) and 0FF00h test dh,(val) shr 8 else test op,val end if else test op,val end if } |
|||
|
18 Jul 2008, 04:08 |
|
|
comrade 18 Jul 2008, 18:31
revolution, what does the extended lea macro do?
|
|||
|
18 Jul 2008, 18:31 |
|
|
revolution 18 Jul 2008, 18:47
comrade wrote: revolution, what does the extended lea macro do? |
|||
|
18 Jul 2008, 18:47 |
|
|
rCX 19 Jul 2008, 02:15
revolution, so is the lea optimization for 16bit or 32bit?
|
|||
|
19 Jul 2008, 02:15 |
|
|
revolution 19 Jul 2008, 02:21
rCX wrote: revolution, so is the lea optimization for 16bit or 32bit? |
|||
|
19 Jul 2008, 02:21 |
|
|
vid 19 Jul 2008, 04:32
might be 16 bit too for "r32 = esi+ebx" (with 66 prefix), no? too much alcohol right now to figure myself
 |
|||
|
19 Jul 2008, 04:32 |
|
|
revolution 19 Jul 2008, 06:50
vid wrote: might be 16 bit too for "r32 = esi+ebx" (with 66 prefix), no? too much alcohol right now to figure myself |
|||
|
19 Jul 2008, 06:50 |
|
|
KeSqueer 21 Sep 2008, 23:59
And my word:
Code: macro mov op1, op2 { if op1 eqtype eax & op2 eqtype 0 & op2 >= -0x80 & op2 < 0x80 push op2 pop op1 else mov op1, op2 end if } |
|||
|
21 Sep 2008, 23:59 |
|
|
vid 22 Sep 2008, 00:22
just take care not to use those macros when you don't have stack (mode switching, etc..)
|
|||
|
22 Sep 2008, 00:22 |
|
< Last Thread | Next Thread > |
Forum Rules:
|