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Index > OS Construction > PM Switch from ring0 to ring3?

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dosin



Joined: 24 Aug 2007
Posts: 337
dosin
There are the Eflags:

EFLAGS_IOPL code:3000h bits: 12,13 = io priv level

and I have read that you can access by means of a gate?

or thourgh syscall and sysenter funtions?

or through the GDT? I was looking at MenuetOS
Code:
MenuetOS code:
ring3_code_l:

        dw     0xffff
        dw     0x0000
        db     0x00
        dw     11011111b *256 +11111010b
        db     0x00

    




Has anyone done this?

or know of any examples to get started with this?

so far I have just been working at ring 0... and I am trying to figure out how to load my driver into ring1 for example... or do I even need to switch rings in order to do this? and then go to ring3 and execute some code to test..


Thanks in advance for any help!
Post 06 Nov 2007, 05:31
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Japheth



Joined: 26 Oct 2004
Posts: 151
Japheth
A switch from ring 0 to ring 3 is done by a RETF or a IRET!

And IOPL is absolutely irrelevant for this mode switch.
Post 06 Nov 2007, 21:55
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dosin



Joined: 24 Aug 2007
Posts: 337
dosin
?A switch from ring 0 to ring 3 is done by a RETF or a IRET!


also:

to go into ring 3 do I use the IRET again to go back to ring 0..

also what about ring 1 and 2?

and would an int ?? cause it to switch since it ends with IRET?

should I place the iret or retf in a function:

set_ring3:

iret
?

so far its locking up the sys when I try it
Post 07 Nov 2007, 00:29
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Japheth



Joined: 26 Oct 2004
Posts: 151
Japheth
> to go into ring 3 do I use the IRET again to go back to ring 0..

this question tells me that you urgently should read the intel documentation first. A switch to a "inner" ring is done through a gate (call, interrupt, trap gates), returning to an "outer" ring is done via RETF/IRET.

> set_ring3:
> iret

Yes, BUT:

if a RETF (IRET) causes a ring switch, the cpu expects not just EIP/CS(/EFL) onto the stack, but additionally ESP/SS. If the VM bit is set in the EFL register copy onto the stack and the cpu is in ring 0, the cpu will also expect v86-mode values for ES,DS,FS,GS onto the stack.
Post 07 Nov 2007, 08:41
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dosin



Joined: 24 Aug 2007
Posts: 337
dosin
Well I have been going over the manual and some other documentation..
hence my confusion on this...


This is from chapter four protection... am I reading in the wrong section on this?
Quote:
---INTEL SYS MANUAL---
4.8. PRIVILEGE LEVEL CHECKING WHEN TRANSFERRING
PROGRAM CONTROL BETWEEN CODE SEGMENTS
To transfer program control from one code segment to another, the segment selector for the
destination code segment must be loaded into the code-segment register (CS). As part of this
loading process, the processor examines the segment descriptor for the destination code segment
and performs various limit, type, and privilege checks. If these checks are successful, the CS
register is loaded, program control is transferred to the new code segment, and program execution
begins at the instruction pointed to by the EIP register.
Program control transfers are carried out with the JMP, CALL, RET, INT n, and IRET instructions,
as well as by the exception and interrupt mechanisms. Exceptions, interrupts, and the
IRET instruction are special cases discussed in Chapter 5, Interrupt and Exception Handling.
This chapter discusses only the JMP, CALL, and RET instructions.
A JMP or CALL instruction can reference another code segment in any of four ways:

This was in a 386 programming book and does not discuss the iret or retf
Quote:
syscall and sysenter


and from looking at other OS and articles...


Thanks for your help and clarifying it...
you given me a good place to start working on it!
Post 08 Nov 2007, 07:27
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