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Index > OS Construction > Keyboard Interrupt Problem

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rhyno_dagreat



Joined: 31 Jul 2006
Posts: 487
Location: Maryland, Unol Daleithiau
rhyno_dagreat
Not sure, as I set everything up during design time. You could try to do it during run-time. I'd be a bit careful with what I was doing, though, as you have to make sure you're not gonna cause a GPF or any such error.
Post 16 Nov 2007, 05:13
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edfed



Joined: 20 Feb 2006
Posts: 4238
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edfed
of course, the goal is to make it works Wink
Post 16 Nov 2007, 13:08
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rhyno_dagreat



Joined: 31 Jul 2006
Posts: 487
Location: Maryland, Unol Daleithiau
rhyno_dagreat
In the end, all it will come down to is a lot of trial and error. Hopefully a lot more trial than error though. Laughing
Post 16 Nov 2007, 14:46
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edfed



Joined: 20 Feb 2006
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edfed
error is the out of workin' space.
the intelligence is, in fact, the capacity to focus on non error space

like a regulation, electronic error corrector, or other transfert functions

if i didn't made any int coding, it's because i make all the theory before writing the first line

i've tested a long time ago to code int for real mode
i saw it works well but i didn't possess the knoledge to make the others parts of the os, so i focused all my brain on learning the X86-32 ┬ÁP features
crossing the references, making abstraction of each component of the system
as INT can be disabled for an infinite time, i will write them after the boot design.
INTs are the more complex things to do

for GPF for exemple, can you imagine a code that corrects the instruction that causes it?
for DIV/0 i want to make a function thats return an infinite value
1/0 = infinite ( 7FFFh)
-1/0 = -infinite (8000h)
and let the code running normally with the infinite value depending on the use of this value

there are a lot of things to do
DMA, aPIC, PIT, 8242, FDC, HDC, all these chips are the components the more hard to code. cauz they are external of the X86 arch

DMA & UDMA are my worst problems
i don't understand how to make a DMA transfert from I/O to MEM, MEM to I/O, MEM to MEM
can the DMA chip access the full 32 address space?
i don't see any doc that precise it!
can the DMA channels programmed to make a DMA transfert of PORT 60h (keyboard) or generally, a transfert from Xport to Ymemory?

MY life IS full of questions???
Post 16 Nov 2007, 15:58
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rhyno_dagreat



Joined: 31 Jul 2006
Posts: 487
Location: Maryland, Unol Daleithiau
rhyno_dagreat
Truth be told, I haven't dug much into DMA. From what I hear it's a very bad setup and in all honesty, I'm trying to avoid it for as long as possible Razz
Post 16 Nov 2007, 16:07
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edfed



Joined: 20 Feb 2006
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edfed
me not, because of SB programing and CPU time economy
Post 16 Nov 2007, 16:29
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rhyno_dagreat



Joined: 31 Jul 2006
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Location: Maryland, Unol Daleithiau
rhyno_dagreat
SB = SoundBlaster?
Post 16 Nov 2007, 17:43
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edfed



Joined: 20 Feb 2006
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edfed
no it's Sally & Billy
Of course it's Sound Blaster and generally Sound Boards
because there is not only Sound Blaster, there are , non exaustive list, OPL3 , AC97, ESS, Analog Devices, Trident, Nforce, and others

the goal is to be like windows, supporting all Sound Boards with the same protocol!

i don't know anything about others cards than SB but i know they all have the 220 port address and a DMA channel
Post 16 Nov 2007, 18:10
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rhyno_dagreat



Joined: 31 Jul 2006
Posts: 487
Location: Maryland, Unol Daleithiau
rhyno_dagreat
Ah, I see. But don't you need to access them through the PCI bus?

Aslo, not sure if you know this or not, but do Graphics cards have generally the same layout or is it completely different and more complicated?
Post 16 Nov 2007, 18:29
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edfed



Joined: 20 Feb 2006
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edfed
all graphic cards have the same basic functions
they just differ in advanced layout ( 3D, BLITTER, etc...)
but the vesa standard and all the bios modes are supposed to be supported

i hope it's the same for sound cards
but my hopeness will not change what it is in reality

it's like the keyboards, they all have the same layout (8242)
the mouses too i think

the problem is to support components that are differents
i don't have exemple but for power management, all mother board constructors have their own layout.

computer world is full of shit, that's why i want to live in the forest with animals
Post 16 Nov 2007, 19:13
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Dex4u



Joined: 08 Feb 2005
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Dex4u
DMA is not that hard.


Last edited by Dex4u on 17 Nov 2007, 16:12; edited 1 time in total
Post 17 Nov 2007, 13:24
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
Quote:
for GPF for exemple, can you imagine a code that corrects the instruction that causes it?

I can't imagine code that would fix falty program

Quote:
for DIV/0 i want to make a function thats return an infinite value
1/0 = infinite ( 7FFFh)
-1/0 = -infinite (8000h)
and let the code running normally with the infinite value depending on the use of this value

bad idea IMO. Can you demonstrate some case where this would be useful?
Post 17 Nov 2007, 13:35
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edfed



Joined: 20 Feb 2006
Posts: 4238
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edfed
for digital signal processing

this div/0 permittivitty will act as an analog saturation, reference of this idea come from electronical operational amplifiers applications.
for memory addressing it can be used to access a real tmp memory location. a global location that is used by kernel as a debug semaphore or something like this.

me too i cannot imagine a code that corrects GPF but i think it is possible to do.

if dma is not hard, it's a good thing, i'll told you my real opinion when i'll code for dma Smile
Post 19 Nov 2007, 09:20
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tom tobias



Joined: 09 Sep 2003
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Location: usa
tom tobias
edfed wrote:
...if dma is not hard, it's a good thing,...
I am at least twenty years behind the times, so please don't rely upon anything I write here or elsewhere, but, in my opinion, inaccurate though that may well be, it is no longer advantageous to use DMA. Why? Well, this is where my ignorance superimposes on my lack of knowledge: I think, and maybe I am completely wrong, that the DMA controller runs at about 5 MHz, i.e. about one hundred times slower than the bus speed of a "modern" computer. In other words, the original intent of the DMA controller was to engage a kind of parallel processing, so that the cpu could crunch numbers, based upon data which the DMA controller fetched from the input port. But, in those days, the cpu bus speed was ALSO about 5 MHz. So, unless I am completely wrong, which may be the case, it is not supportive of the cpu to tie up the system bus for ~~100 cycles, ostensibly to save time for the cpu to work, but in fact, causing the cpu to idle, since it cannot access the bus to move data to and from memory, apart from on chip cache. Too many opinions, insufficient data!!! Sorry if I am completely wrong.
Post 19 Nov 2007, 13:33
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edfed



Joined: 20 Feb 2006
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edfed
UDMA 33 is at 33 MHz
and i think there is also a UDMA XX that is faster
why do they continue the implementation of DMA on bridge if it is really bad?
for USB devices, a data transfert of Giga bytes brings the system to be really slow if there is a long IO latency, with UDMA redirected to USB it can increase the quality of the system.

the lack of free official documents about UDMA and all domestic hardware is bad!!
Post 19 Nov 2007, 14:32
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4633
Location: Argentina
LocoDelAssembly
I don't know if it works at 5 MHz tom, but you are right it is slow (well, I think Razz). But the point here is that modern hardware DOES NOT use the DMA controller and use the DMA transfers mode provided by the PCI bus (bus mastering?).

You can see at the Windows' Device Manager that the floppy controller uses a DMA channel (at least my computer uses DMA 02), but your HDD controller will use no channel but still has DMA enabled, this is because it does not uses the DMA controller but the mechanisms provided by the PCI bus instead.
Post 19 Nov 2007, 15:38
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edfed



Joined: 20 Feb 2006
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edfed
excuse me for the poor question, but i need a precision.
what means exactlly 'ctrl break', speaking about keyboard.
Post 10 Dec 2007, 02:00
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tom tobias



Joined: 09 Sep 2003
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tom tobias
edfed wrote:
...
what means exactlly 'ctrl break', speaking [writing] about keyboard[?]

To stop the execution of a command before it has completed, press [Ctrl] + [Break] (control-break) simultaneously. The somewhat-obscure Break key is typically located near the Scroll Lock and Print Screen keys. Who knew it?
Post 10 Dec 2007, 14:13
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edfed



Joined: 20 Feb 2006
Posts: 4238
Location: 2018
edfed
so, it need's to execute a sub int9:
when scancode is a key
push key
set/reset key

when scancode is not a key:
don't push key
don't set key
remember code

when scancode is extended:
translate scancode
return extendedcode
jmp to scancode=key

when resulting code is a system code:
don't push key
don't set key
call systemfunc
remembercode


strange, but, when it's a soft int, param are in al/ax/eax...
with hard int, param come from port in al/ax/eax...

all these shemes are exemples.

it's hard to code the irq1 .. :-s
Post 10 Dec 2007, 22:13
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dosin



Joined: 24 Aug 2007
Posts: 337
dosin
are you in Protected mode and enabled the timer-irq0?
did you enable it with? 0xFE?
Code:
mov al,0xFE         ; IRQ0 [timer] disables keyboard
out 0x21,al
    

if this is not a problem for you I just wanted to add that if you use 0xFE it will disable the Keyboard irq1.
Code:
mov al,0xFC         ; IRQ0 [timer] enable keyboard/timer
out 0x21,al
    

since this is before multitasking you can just add:
Code:
irq0:
mov al,0x20
out 0x20,al
iret

irq1:
;read key stuff goes here
mov al,0x20
out 0x20,al
iret
    

I did this and took a while and a lot of net searching to find out why in pmode my irq0 was firing but not the irq1...

hope this helps someone programming the keyboard!


Last edited by dosin on 11 Dec 2007, 04:18; edited 1 time in total
Post 11 Dec 2007, 04:09
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