flat assembler
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Index > Heap > new 128-Bit SSE5 Instruction Set

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Ivan2k2



Joined: 08 Sep 2004
Posts: 80
Location: Russia, Angarsk
Ivan2k2
Post 30 Aug 2007, 08:39
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Madis731



Joined: 25 Sep 2003
Posts: 2141
Location: Estonia
Madis731
I lllllllllliiike bitreverse Very Happy long-awaited. 4 obligatory parameters seems too much, but I hope we get used to it Wink

Hmm, shouldn't PTEST be already implemented by the Intel's SSE4? http://en.wikipedia.org/wiki/SSE4
Post 30 Aug 2007, 10:47
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asmfan



Joined: 11 Aug 2006
Posts: 392
Location: Russian
asmfan
hmmm another CISC architecture extension...
Post 30 Aug 2007, 11:01
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