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Kicer



Joined: 30 Apr 2005
Posts: 34
Location: Poland
Kicer
Hi
i have a quesiton about salc instruction.
i saw it in fasm's docs but i couldn't find it in intel's documentations.
am i blind ?
Post 22 Jun 2007, 10:47
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f0dder



Joined: 19 Feb 2004
Posts: 3170
Location: Denmark
f0dder
Post 22 Jun 2007, 11:36
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MazeGen



Joined: 06 Oct 2003
Posts: 959
Location: Czechoslovakia
MazeGen
BTW, Intel claims it is undefined and reserved, not that it is kind of NOP.
Post 22 Jun 2007, 11:41
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4633
Location: Argentina
LocoDelAssembly
There is no mention of what it does in the AMD64 Volume 3, but if you search it you will it in the table A-1 marked with number 3 which means "3. Invalid in 64-bit mode.".

I though it was documented and actually I used it in a code recently posted by me. Well, I take resposability only up to the currently made processors to the date Razz
Post 22 Jun 2007, 13:10
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f0dder



Joined: 19 Feb 2004
Posts: 3170
Location: Denmark
f0dder
You can use the documented SETcc instruction instead - for instance, SETC AL, which is roughly equivalent to SALC (1 instead of 0xFF though).
Post 22 Jun 2007, 13:26
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4633
Location: Argentina
LocoDelAssembly
If you really need an equivalent then use sbb al, al instead (if changing the flags isn't a problem).
Post 22 Jun 2007, 13:34
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kohlrak



Joined: 21 Jul 2006
Posts: 1421
Location: Uncle Sam's Pad
kohlrak
I personally don't see it overly useful (unless you want to stuff FF in AL upon a certain tested condition), but i don't see why companies would put instructions in their processors if they don't plan on supporting it... Unless they're reserving the name for something else... But i don't see the point in reserving this name or it's operation.
Post 23 Jun 2007, 02:53
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rugxulo



Joined: 09 Aug 2005
Posts: 2341
Location: Usono (aka, USA)
rugxulo
TetrOS uses it.
Post 25 Jun 2007, 00:44
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