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lazer1



Joined: 24 Jan 2006
Posts: 185
lazer1 11 May 2007, 22:43
currently fasm doesnt warn about incorrect lock usage,

eg

Code:
    lock cmp eax, ebx
    


assembles fine even though it will crash the cpu on 2 counts:

lock isnt allowed with cmp and also lock requires a memory operand
which will be modified,

is it possible for fasm to warn on incorrect lock usage? Surprised

at least for the case where the code is done entirely via opcodes
and not via db constructs,

as I have several times used lock incorrectly and had to waste time
debugging to locate the problem,
Post 11 May 2007, 22:43
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revolution
When all else fails, read the source


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revolution 11 May 2007, 23:41
fasm doesn't generate any warnings. This is a good thing. Warnings are too troublesome and for the most part useless. The above code you post is an error on some processors and okay on others. If fasm were to have warnings then it would also need to know about all the different types of CPU's on the market both now and in the past.

Basically, if your code has an error like the above then it is you that must fix it, not the assembler. That is why we must test our programs an then test again, after that we need to test once more.

lazer1 wrote:
as I have several times used lock incorrectly and had to waste time debugging to locate the problem
Why must you waste time. If the CPU gives a GPF then it is trivial to get the fault address and see the lock code there. Also, unless you are writing some SMP code (maybe a SMP OS?) then there is generally no need to use lock at all.
Post 11 May 2007, 23:41
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MazeGen



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MazeGen 14 May 2007, 13:18
revolution wrote:
The above code you post is an error on some processors and okay on others.

What processor is that instruction valid on?
Post 14 May 2007, 13:18
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revolution
When all else fails, read the source


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revolution 14 May 2007, 17:26
MazeGen wrote:
What processor is that instruction valid on?
I remember the old Cyrus chips were quite happy with lock being thrown in to the code stream.
Post 14 May 2007, 17:26
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MazeGen



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MazeGen 15 May 2007, 06:10
You probably mean Cyrix. I really don't think that fasm should support such obsolete, manufacturer-specific instructions. Additionally, there are some Cyrix-specific instructions and fasm doesn't support them at all.
Post 15 May 2007, 06:10
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revolution
When all else fails, read the source


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revolution 15 May 2007, 22:54
MazeGen wrote:
You probably mean Cyrix. I really don't think that fasm should support such obsolete, manufacturer-specific instructions. Additionally, there are some Cyrix-specific instructions and fasm doesn't support them at all.
Yes, I do mean Cyrix, thanks for the correction.

Once thing I always hate about most C compilers was the seemingly unending list of warnings they would produce, most of the warnings were totally useless crap that only served to make my screen fill up with text. Many times for open source code the author would need to state something like "ignore the warnings you get when compiling", to me that always seemed very silly.
Post 15 May 2007, 22:54
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vid
Verbosity in development


Joined: 05 Sep 2003
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vid 16 May 2007, 00:10
Quote:
most of the warnings were totally useless crap that only served to make my screen fill up with text

which ones? Evil or Very Mad

Quote:
Many times for open source code the author would need to state something like "ignore the warnings you get when compiling", to me that always seemed very silly.

yeah, this one is true. It is extremely hard to get rid of warnings, if you must use 3rd party code which isn't properly written. And writing something really "properly" in C is a great pain.

Anyway, warnings are usually useful and good idea. Whoever doesn't like them can turn them off, it takes just few seconds
Post 16 May 2007, 00:10
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lazer1



Joined: 24 Jan 2006
Posts: 185
lazer1 19 May 2007, 16:21
revolution wrote:
fasm doesn't generate any warnings. This is a good thing. Warnings are too troublesome and for the most part useless.


I completely disagree, badly done warnings are a total pain,
especially style warnings,

but optional warnings can save hours of time eg with C compilers
uninitialised local variables warnings can save weeks of time,

that is the WHOLE POINT of warnings, they WARN you that what you
are doing is allowed but BAD,

Quote:
The above code you post is an error on some processors and okay on others.


the intel docs say its a fault AND the AMD cpus I am testing the code
on agrees with the intel docs,

Quote:

If fasm were to have warnings then it would also need to know about all the different types of CPU's on the market both now and in the past.


not really, I am just asking that fasm conforms to the Intel Vol 3 documentation,

that is THE definitive document on 32 bit x86 functionality,

Quote:

Basically, if your code has an error like the above then it is you that must fix it, not the assembler. That is why we must test our programs an then test again, after that we need to test once more.


King Canute! compiler warnings have been STANDARD THINKING
since the year dot. eg lock is meaningless if the destination isnt
in memory, so you want a warning especially as it will crash
standard CPUs,

Quote:

lazer1 wrote:
as I have several times used lock incorrectly and had to waste time debugging to locate the problem
Why must you waste time. If the CPU gives a GPF then it is trivial to get the fault address and see the lock code there.


I get the fault address, but the code is long mode and
the disassembler I have only does 32 bit, so I have to do
a LOT of echoing of label addresses to find where the problem is,

unless you know of a free long mode disassembler,

Quote:
Also, unless you are writing some SMP code (maybe a SMP OS?) then there is generally no need to use lock at all.


BINGO! I am writing SMP long mode code, which is why I need lock

the system cannot run without say "lock bts",

eg each cpu can echo text, but without lock, 2 cpus could echo at the
same time which will crash the system,

furthermore even if it were just uniprocessor code, you'd still want lock
for forwards compatibility. The machine here happens to be 2-cpu,
but the code needs to run on 4, 8 etc cpus.
Post 19 May 2007, 16:21
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
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LocoDelAssembly 19 May 2007, 17:41
Quote:

not really, I am just asking that fasm conforms to the Intel Vol 3 documentation,

that is THE definitive document on 32 bit x86 functionality,


OK, time to remove 3DNow from fasm then Wink

Quote:
unless you know of a free long mode disassembler,


http://board.flatassembler.net/topic.php?t=5045
Post 19 May 2007, 17:41
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LocoDelAssembly
Your code has a bug


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LocoDelAssembly 19 May 2007, 18:47
Here a macro for you
Code:
macro lock instr_dest, src
{
common
local aux

  lock instr_dest, src

  match instr dest, instr_dest
  \{
    aux equ BAD_INSTR

    irps ins, adc add and btc btr bts cmpxchg cmpxchg8b cmpxchg16b dec inc neg not or sbb sub xadd xchg xor
    \\{
      match =instr, ins\\\{aux equ OK_INSTR\\\}
    \\}

    match =BAD_INSTR, aux
    \\{
      display "ERROR: Invalid instruction for lock prefix", 13, 10
      ; NOTE: Things like "lock rep xor [ebx], eax" are not allowed even though REP doesn't produce any exception
      err
    \\}

    if ~dest eqtype [0]
      display "ERROR: Using lock prefix with no memory destination", 13, 10
      err
    end if
  \}
}    
Post 19 May 2007, 18:47
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lazer1



Joined: 24 Jan 2006
Posts: 185
lazer1 20 May 2007, 16:07
LocoDelAssembly wrote:
Quote:

not really, I am just asking that fasm conforms to the Intel Vol 3 documentation,

that is THE definitive document on 32 bit x86 functionality,


OK, time to remove 3DNow from fasm then Wink


well, it is definitive on the things it talks about which
it started

so it isnt definitive on 64 bit

BTW this system isnt something I did overnight but
I have been working on it for about 1.5 years now,
entirely coded with fasm,

it boots directly from a floppy disk unhosted,
and is major work eg just the memory system
on its own is months of coding

the multiprocessing part is at a very early stage:

right now I have all the cpus booted to 64 bit,
but only the BSP is truly functional,

coordinating the cpus is a bit like traffic lights
at a crossroads: some things are in parallel
and some things are halted,

every time I see traffic lights I think of
multiprocessing as that is multicar multiperson,
really pedestrian crossings should be 2 lane
as the 2 directions tend to collide, you have to
dodge the people going in the other direction,

this AMD Turion X2 has just 2 cpus, but my
system will run on any number of cpus:
1,2,4,8,16,32,64,128,256

(or in between amounts)

x86 is limited to 256 cpus, I think if you have
too many cpus physical memory access will become a
bottleneck

at the moment the AP's can just do memory
only software AND text echoing to the shared
screen,

all text is via the legacy 80 x 25 h/w text screen at b8000h

Quote:

Quote:
unless you know of a free long mode disassembler,


http://board.flatassembler.net/topic.php?t=5045


where or how do I download it?
Post 20 May 2007, 16:07
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lazer1



Joined: 24 Jan 2006
Posts: 185
lazer1 20 May 2007, 16:13
LocoDelAssembly wrote:
Here a macro for you
Code:
macro lock instr_dest, src
{
common
local aux

  lock instr_dest, src

  match instr dest, instr_dest
  \{
    aux equ BAD_INSTR

    irps ins, adc add and btc btr bts cmpxchg cmpxchg8b cmpxchg16b dec inc neg not or sbb sub xadd xchg xor
    \\{
      match =instr, ins\\\{aux equ OK_INSTR\\\}
    \\}

    match =BAD_INSTR, aux
    \\{
      display "ERROR: Invalid instruction for lock prefix", 13, 10
      ; NOTE: Things like "lock rep xor [ebx], eax" are not allowed even though REP doesn't produce any exception
      err
    \\}

    if ~dest eqtype [0]
      display "ERROR: Using lock prefix with no memory destination", 13, 10
      err
    end if
  \}
}    


that is the most severe macro I have seen!

I'll try it out Razz
Post 20 May 2007, 16:13
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LocoDelAssembly
Your code has a bug


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LocoDelAssembly 20 May 2007, 16:16
http://board.flatassembler.net/topic.php?p=55710#55710
But since it's your own OS it will not work, sorry I though you was doing Windows/Linux 64-bit multi-threaded code.
Post 20 May 2007, 16:16
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lazer1



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Posts: 185
lazer1 20 May 2007, 17:58
LocoDelAssembly wrote:
http://board.flatassembler.net/topic.php?p=55710#55710
But since it's your own OS it will not work, sorry I though you was doing Windows/Linux 64-bit multi-threaded code.


as long as it disassembles files I can use it above XP,
can it disassemble files?

I build my system on XP but run it directly,

from the fault handler I can get the faulting address
and then look that up in the binary file on Windows,
Post 20 May 2007, 17:58
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LocoDelAssembly
Your code has a bug


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LocoDelAssembly 20 May 2007, 18:10
I never tried it but some people here did and seems to work, but, it is a debugger, you need Win64 or Linux64 and a PE64 or ELF64 respectively. Look at Madis's FDBG screenshot here http://www.tud.ttu.ee/~t060429/Up/Optimal.png
Post 20 May 2007, 18:10
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lazer1



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lazer1 20 May 2007, 20:01
LocoDelAssembly wrote:
I never tried it but some people here did and seems to work, but, it is a debugger, you need Win64 or Linux64 and a PE64 or ELF64 respectively. Look at Madis's FDBG screenshot here http://www.tud.ttu.ee/~t060429/Up/Optimal.png


the advantage of the IDA disassembler is it will disassemble direct
binaries, you interactively tell it what ORG to use and which cpu mode,

you also tell it whether to interpret memory as data or as code,
and it automatically recognises certain standard things,

the only problem is it wont disassemble long mode,

I've checked just now, it looks like the commercial version of IDA
does 64 bit disassembly,

a shell based disassembler would be fine just as long as you
can disassemble binary files directly and specify:

org,
cpu mode,
start address

you then do something like:

disassemble somefile long 10000h 15000h

the advantage of shell based programs is they are more portable,
Post 20 May 2007, 20:01
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LocoDelAssembly
Your code has a bug


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LocoDelAssembly 20 May 2007, 20:39
I'm "studying" maths now for the exam I have tomorrow. I'll try after the exam to produce some listing generator using macros, I think it should be possible using again irps however I can't do it in a couple of minutes because there are lot of instructions plus the assembler directives that produce some output.

BTW, after using the lock macro you are still experiencing faults? Note that maybe it's something else then.
Post 20 May 2007, 20:39
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lazer1



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Posts: 185
lazer1 23 May 2007, 19:55
LocoDelAssembly wrote:
I'm "studying" maths now for the exam I have tomorrow. I'll try after the exam to produce some listing generator using macros, I think it should be possible using again irps however I can't do it in a couple of minutes because there are lot of instructions plus the assembler directives that produce some output.

BTW, after using the lock macro you are still experiencing faults? Note that maybe it's something else then.


no faults at the moment as I debugged those before I made the post,

the request was to deal with future use of lock,

I tried your code but it doesnt like:

Code:
   use16
   lock bts dword [ fs : ecx ], 0
    


I get error message:

Code:
ERROR: Using lock prefix with no memory destination
lock.asm [8]:
        lock bts dword [ fs : ecx ], 0
lock_macro.txt [26] lock [24]:
      err
error: illegal instruction.
    
Post 23 May 2007, 19:55
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LocoDelAssembly
Your code has a bug


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LocoDelAssembly 24 May 2007, 16:07
The problem is that eqtype distingishes between "dword [mem]" and "[mem]". Replace "if ~dest eqtype [0]" with "if dest eqtype eax".
Post 24 May 2007, 16:07
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rugxulo



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rugxulo 24 May 2007, 21:28
Last I heard, Tomasz only officially supports targeting Intel and AMD chips (although he once helped someone with a Cyrix chip get FASM running on it, at least).

AMD64 disassembler? Try distorm64 (updated May 19, 2007) or BIEW (updated Apr. 14, 2007).
Post 24 May 2007, 21:28
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