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> Compiler Internals > "Error: value out of range" |
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vid 26 May 2007, 11:13
64bit mode allows only signed 32bit immediates.
Only instruction that can take 64bit immediate is "mov rax, imm64" |
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26 May 2007, 11:13 |
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Adam Kachwalla 26 May 2007, 11:24
So I guess this should work right?
Code: USE64 POP R10 MOV R9,0x7FFFFFFFF AND R10,R9 |
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26 May 2007, 11:24 |
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vid 26 May 2007, 12:20
no, it won't work with other register than "rax".
this will work: Code: use64 pop r10 mov rax, 0x7FFFFFFFF and r10, rax |
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26 May 2007, 12:20 |
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Xorpd! 27 May 2007, 03:04
Quote:
I think you are confusing two separate issues. The "mov rax, moffs64" syntax only works with (absolute addressing), but mov r10, imm64 is a syntax that works with any of the 16 integer registers. One of the big conveniences of x86, and by extension x86-64, is the ability to load an integer register with an immediate in a single instruction. Try doing that in the mips ISA for example and see how many instructions in takes! |
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27 May 2007, 03:04 |
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LocoDelAssembly 27 May 2007, 04:14
Yes, its pretty hard. Here my try
Code: ; r0: Always contains 0 ; r1: Reserved for assembler use (obviously fasmMIPS doesn't reserve it because it ; doesn't have built-in macroinstruction such as LI) macro li reg, imm { if ~reg eqtype r0 display "I said a register, BITCH!", 13, 10 err else if reg eq r1 display "Destination register is reserved for LI", 13, 10 err else if imm >= 1 shl 32 display "Immediate out of range", 13, 10 err end if if (imm >= -1 shl 15) & (imm < 1 shl 15) addiu reg, r0, imm else lui reg, imm shr 16 and $FFFF ori reg, imm and $FFFF end if } macro li64 reg, imm { if ~reg eqtype r0 display "I said a register, BITCH!", 13, 10 err else if reg eq r1 display "Destination register is reserved for LI", 13, 10 err end if if imm >= 0 if imm < 1 shl 15 addiu reg, r0, imm else if imm < 1 shl 31 lui reg, imm shr 16 and $FFFF ori reg, imm and $FFFF end if else lui r1, imm shr 48 and $FFFF lui reg, imm shr 16 and $FFFF ori r1, r1, imm shr 32 and $FFFF ori reg, reg, imm and $FFFF ; WARNING: The processor must be properly initialized to prevent Reserved Instruction exception. ; Obviously it must be a MIPS64 aswell... dsll32 reg, reg, 0 dsll32 r1, r1, 0 dsrl32 reg, reg, 0 or reg, r1, reg end if } Note that I'm not a MIPS assembly programmer so possibly this is not the best way. [EDIT] I corrected a sign extention related bug and improved the macros a little. I found the li64 ridiculously complex, any suggestion is welcomed.[/EDIT] |
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27 May 2007, 04:14 |
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vid 27 May 2007, 07:09
xorpd: you are right
sorry for confusion |
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27 May 2007, 07:09 |
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Goplat 27 May 2007, 17:26
Since ANDing with 7FFFFFFFF only affects the high dword, you could also do it using a dword operation like this:
Code: and dword [rsp+4],7 pop r10 |
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27 May 2007, 17:26 |
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Xorpd! 28 May 2007, 06:52
Quote:
While it's true that this approach has the effect you want, it's nightmare code that is thinking 32-bit in a 64-bit world. I have seen gcc generate code like this which is bad because it violates store forwarding. |
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28 May 2007, 06:52 |
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