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HyperVista



Joined: 18 Apr 2005
Posts: 691
Location: Virginia, USA
HyperVista 22 May 2007, 14:50
I'm porting some assembly code to fasm. What is the fasm equivalent of:
Code:
msr0x480:  .space 88
         .align 16
         .space 512
             .......
         host_TSS
             .space 26 * 4

             .....
             .....
             and so on....
    


It's the .space thingy I'm trying to port ... Thanks.
Post 22 May 2007, 14:50
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4624
Location: Argentina
LocoDelAssembly 22 May 2007, 15:26
If ".space" reserves memory then "r{b,w,d,q,t}" is the port.

[edit]
MIPSproTM Assembly Language Programmer’s Guide wrote:
.space expression Advances the location counter by the value of the
specified expression bytes. The assembler fills the space
with zeros.


If that is the meaning of .space then this is the port
Code:
macro .space bytes{times bytes db 0}    
Post 22 May 2007, 15:26
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HyperVista



Joined: 18 Apr 2005
Posts: 691
Location: Virginia, USA
HyperVista 22 May 2007, 15:39
Thanks LocoDelAsembly!

Yes, .space reserves a contiguous block of memory.

What you pointed me to is table 1.3 "Data Directive" in the documentation .... sorry I missed that when I was searching the docs before posting.

Thanks again for the help.

[edit]

.space has a different meaning for MIPS. The .space I'm refering to is from Linux x86 based assembly programming and reserves a block of memory. I think you are correct in the r{b, w, d, q, t} suggestion. This is from a linux assembly language programming doc:

Quote:
What about an array of characters? We can ask the assembler to leave space for this using the .space directive, e.g. for a 6-character array:

y: .space 6 # reserve 6 bytes of space

Post 22 May 2007, 15:39
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid 22 May 2007, 22:33
yeah, then just use
Code:
rb 6    


anyway, you should post entire code. I suspect this is just some kind of structure declaration, that should be under "virtual" in FASM.
Post 22 May 2007, 22:33
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HyperVista



Joined: 18 Apr 2005
Posts: 691
Location: Virginia, USA
HyperVista 23 May 2007, 00:57
Here's the entire code I'm trying to port to fasm:

I started with vmxstep3.s because that's the VMCS and I'm most interested in getting a fasm VMCS up and running. I'm not planning on implementing the UART stuff.

vmxstep3.s
Code:
# list of imported symbols
     .extern guest_selLDT, guest_selTSS
  .extern guest_limLDT, guest_limTSS
  .extern guest_limGDT, guest_limIDT
  .extern guest_PGDIR, guest_TOS3, guest_task, theVMM
 .extern guest_LDT, guest_TSS, guest_GDT, guest_IDT
  .extern host_selCS0, host_selDS0, host_selTSS
       .extern host_level4, host_TOS0, ARENA
       .extern host_TSS, host_GDT, host_IDT

    # list of exported symbols
  .global machine, ELEMENTS
   .global results, ROCOUNT


    .include        "vmxstep1.s"
      .include        "vmxstep2.s"

  .section        .data
#------------------------------------------------------------------
machine:
# Natural 16-bit Guest State fields
 .int    0x0800, guest_ES_selector
   .int    0x0802, guest_CS_selector
   .int    0x0804, guest_SS_selector
   .int    0x0806, guest_DS_selector
   .int    0x0808, guest_FS_selector
   .int    0x080A, guest_GS_selector
   .int    0x080C, guest_LDTR_selector
 .int    0x080E, guest_TR_selector
# Natural 32-bit Guest State fields
    .int    0x4800, guest_ES_limit
      .int    0x4802, guest_CS_limit
      .int    0x4804, guest_SS_limit
      .int    0x4806, guest_DS_limit
      .int    0x4808, guest_FS_limit
      .int    0x480A, guest_GS_limit
      .int    0x480C, guest_LDTR_limit
    .int    0x480E, guest_TR_limit
      .int    0x4810, guest_GDTR_limit
    .int    0x4812, guest_IDTR_limit
    .int    0x4814, guest_ES_access_rights
      .int    0x4816, guest_CS_access_rights
      .int    0x4818, guest_SS_access_rights
      .int    0x481A, guest_DS_access_rights
      .int    0x481C, guest_FS_access_rights
      .int    0x481E, guest_GS_access_rights
      .int    0x4820, guest_LDTR_access_rights
    .int    0x4822, guest_TR_access_rights
      .int    0x4824, guest_interruptibility
      .int    0x4826, guest_activity_state
        .int    0x4828, guest_SMBASE
        .int    0x482A, guest_SYSENTER_CS
# Natural 64-bit Guest State fields
    .int    0x6800, guest_CR0
   .int    0x6802, guest_CR3
   .int    0x6804, guest_CR4
   .int    0x6806, guest_ES_base
       .int    0x6808, guest_CS_base
       .int    0x680A, guest_SS_base
       .int    0x680C, guest_DS_base
       .int    0x680E, guest_FS_base
       .int    0x6810, guest_GS_base
       .int    0x6812, guest_LDTR_base
     .int    0x6814, guest_TR_base
       .int    0x6816, guest_GDTR_base
     .int    0x6818, guest_IDTR_base
     .int    0x681A, guest_DR7
   .int    0x681C, guest_RSP
   .int    0x681E, guest_RIP
   .int    0x6820, guest_RFLAGS
        .int    0x6822, guest_pending_debug_x
       .int    0x6824, guest_SYSENTER_ESP
  .int    0x6826, guest_SYSENTER_EIP
# Full 64-bit Guest State fields
      .int    0x2800, guest_VMCS_link_pointer_full
        .int    0x2801, guest_VMCS_link_pointer_high
        .int    0x2802, guest_IA32_DEBUGCTL_full
    .int    0x2803, guest_IA32_DEBUGCTL_high
#
# Natural 16-bit Host State fields
 .int    0x0C00, host_ES_selector
    .int    0x0C02, host_CS_selector
    .int    0x0C04, host_SS_selector
    .int    0x0C06, host_DS_selector
    .int    0x0C08, host_FS_selector
    .int    0x0C0A, host_GS_selector
    .int    0x0C0C, host_TR_selector
# Natural 32-bit Host State fields
      .int    0x4C00, host_SYSENTER_CS
# Natural 64-bit Host State fields
      .int    0x6C00, host_CR0
    .int    0x6C02, host_CR3
    .int    0x6C04, host_CR4
    .int    0x6C06, host_FS_base
        .int    0x6C08, host_GS_base
        .int    0x6C0A, host_TR_base
        .int    0x6C0C, host_GDTR_base
      .int    0x6C0E, host_IDTR_base
      .int    0x6C10, host_SYSENTER_ESP
   .int    0x6C12, host_SYSENTER_EIP
   .int    0x6C14, host_RSP
    .int    0x6C16, host_RIP
#
# Natural 32-bit Control fields
    .int    0x4000, control_VMX_pin_based
       .int    0x4002, control_VMX_cpu_based
       .int    0x4004, control_exception_bitmap
    .int    0x4006, control_pagefault_errorcode_mask
    .int    0x4008, control_pagefault_errorcode_match
   .int    0x400A, control_CR3_target_count
    .int    0x400C, control_VM_exit_controls
    .int    0x400E, control_VM_exit_MSR_store_count
     .int    0x4010, control_VM_exit_MSR_load_count
      .int    0x4012, control_VM_entry_controls
   .int    0x4014, control_VM_entry_MSR_load_count
     .int    0x4016, control_VM_entry_interruption_info
  .int    0x4018, control_VM_entry_exception_errorcode
        .int    0x401A, control_VM_entry_instruction_length
 .int    0x401C, control_Task_PRivilege_Threshold
# Natural 64-bit Control fields
 .int    0x6000, control_CR0_mask
    .int    0x6002, control_CR4_mask
    .int    0x6004, control_CR0_shadow
  .int    0x6006, control_CR4_shadow
  .int    0x6008, control_CR3_target0
 .int    0x600A, control_CR3_target1
 .int    0x600C, control_CR3_target2
 .int    0x600E, control_CR3_target3
# Full 64-bit Control fields
 .int    0x2000, control_IO_BitmapA_address_full 
    .int    0x2001, control_IO_BitmapA_address_high 
    .int    0x2002, control_IO_BitmapB_address_full 
    .int    0x2003, control_IO_BitmapB_address_high 
    # next two field-encodings unsupported on Xeon
#     .int    0x2004, control_MSR_Bitmaps_address_full
#   .int    0x2005, control_MSR_Bitmaps_address_high
    .int    0x2006, control_VMexit_MSR_store_address_full
       .int    0x2007, control_VMexit_MSR_store_address_high
       .int    0x2008, control_VMexit_MSR_load_address_full
        .int    0x2009, control_VMexit_MSR_load_address_high
        .int    0x200A, control_VMentry_MSR_load_address_full
       .int    0x200B, control_VMentry_MSR_load_address_high
       .int    0x200C, control_Executive_VMCS_pointer_full
 .int    0x200D, control_Executive_VMCS_pointer_high
 # next two field-encodings unsupported on Xeon/Core2
#       .int    0x200E, 0
#  .int    0x200F, 0
   .int    0x2010, control_TSC_offset_full
     .int    0x2011, control_TSC_offset_high
     # next two field-encodings unsupported on Xeon
#     .int    0x2012, control_virtual_APIC_page_address_full
#     .int    0x2013, control_virtual_APIC_page_address_high

  .equ    ELEMENTS, (. - machine)/8
#------------------------------------------------------------------
#------------------------------------------------------------------
results:
# Natural 32-bit Read-Only Data fields
   .int    0x4400, info_vmxinstr_error
 .int    0x4402, info_vmexit_reason
  .int    0x4404, info_vmexit_interrupt_information
   .int    0x4406, info_vmexit_interrupt_error_code
    .int    0x4408, info_IDT_vectoring_information
      .int    0x440A, info_IDT_vectoring_error_code
       .int    0x440C, info_vmexit_instruction_length
      .int    0x441E, info_vmx_instruction_information
# Natural 64-bit Read-Only Data fields
  .int    0x6400, info_exit_qualification
     .int    0x6402, info_IO_RCX
 .int    0x6404, info_IO_RSI
 .int    0x6406, info_IO_RDI
 .int    0x6408, info_IO_RIP
 .int    0x640A, info_guest_linear_address

       .equ    ROCOUNT, (. - results)/8
#------------------------------------------------------------------
# Natural 16-bit Guest State fields
guest_ES_selector:                        .short  0x0000  
guest_CS_selector:                      .short  ARENA >> 4
guest_SS_selector:                      .short  ARENA >> 4
guest_DS_selector:                      .short  0x0000
guest_FS_selector:                        .short  0x0000
guest_GS_selector:                        .short  0x0000
guest_LDTR_selector:                      .short  guest_selLDT
guest_TR_selector:                  .short  guest_selTSS
# Natural 32-bit Guest State fields
guest_ES_limit:                              .int    0x0000FFFF
guest_CS_limit:                               .int    0x0000FFFF
guest_SS_limit:                               .int    0x0000FFFF
guest_DS_limit:                               .int    0x0000FFFF
guest_FS_limit:                               .int    0x0000FFFF
guest_GS_limit:                               .int    0x0000FFFF
guest_LDTR_limit:                     .int    guest_limLDT
guest_TR_limit:                             .int    guest_limTSS
guest_GDTR_limit:                   .int    guest_limGDT
guest_IDTR_limit:                   .int    guest_limIDT
guest_ES_access_rights:                     .int    0x000000F3
guest_CS_access_rights:                       .int    0x000000F3
guest_SS_access_rights:                       .int    0x000000F3
guest_DS_access_rights:                       .int    0x000000F3
guest_FS_access_rights:                       .int    0x000000F3
guest_GS_access_rights:                       .int    0x000000F3
guest_LDTR_access_rights:             .int    0x00000082
guest_TR_access_rights:                       .int    0x0000008B
guest_interruptibility:                       .int    0x00000000
guest_activity_state:                 .int    0x00000000
guest_SMBASE:                         .int    0x000A0000
guest_SYSENTER_CS:                    .int    0x00000000
# Natural 64-bit Guest State fields
guest_CR0:                             .quad   0x80000031
guest_CR3:                            .quad   guest_PGDIR + ARENA
guest_CR4:                           .quad   0x00002011
guest_ES_base:                                .quad   0x00000000
guest_CS_base:                                .quad   ARENA
guest_SS_base:                             .quad   ARENA
guest_DS_base:                             .quad   0x00000000
guest_FS_base:                                .quad   0x00000000
guest_GS_base:                                .quad   0x00000000
guest_LDTR_base:                      .quad   guest_LDT + ARENA
guest_TR_base:                         .quad   guest_TSS + ARENA
guest_GDTR_base:                       .quad   guest_GDT + ARENA
guest_IDTR_base:                       .quad   guest_IDT + ARENA
guest_DR7:                             .quad   0x00000000
guest_RSP:                            .quad   guest_TOS3
guest_RIP:                            .quad   guest_task
guest_RFLAGS:                         .quad   0x00020002
guest_pending_debug_x:                        .quad   0x00000000
guest_SYSENTER_ESP:                   .quad   0x00000000
guest_SYSENTER_EIP:                   .quad   0x00000000
# Full 64-bit Guest State fields
guest_VMCS_link_pointer_full:             .int    0xFFFFFFFF
guest_VMCS_link_pointer_high:         .int    0xFFFFFFFF
guest_IA32_DEBUGCTL_full:             .int    0x00000000
guest_IA32_DEBUGCTL_high:             .int    0x00000000
#------------------------------------------------------------------
# Natural 16-bit Host State fields
host_ES_selector:                        .short  0x0000
host_CS_selector:                 .short  host_selCS0
host_SS_selector:                    .short  host_selDS0
host_DS_selector:                    .short  0x0000
host_FS_selector:                 .short  0x0000
host_GS_selector:                 .short  0x0000
host_TR_selector:                 .short  host_selTSS
# Natural 32-bit Host State fields
host_SYSENTER_CS:                      .int    0x00000000
# Natural 64-bit Host State fields
host_CR0:                               .quad   0x80000021      
host_CR3:                               .quad   host_level4 + ARENA
host_CR4:                            .quad   0x00002020      
host_FS_base:                           .quad   0x00000000
host_GS_base:                         .quad   0x00000000
host_TR_base:                         .quad   host_TSS
host_GDTR_base:                         .quad   host_GDT
host_IDTR_base:                         .quad   host_IDT
host_SYSENTER_ESP:                      .quad   0x00000000
host_SYSENTER_EIP:                    .quad   0x00000000
host_RSP:                             .quad   host_TOS0
host_RIP:                              .quad   theVMM
#------------------------------------------------------------------
# Natural 32-bit Control fields
control_VMX_pin_based:                  .int    0x00000016      
control_VMX_cpu_based:                  .int    0x0401E172
control_exception_bitmap:             .int    0x00000000
control_pagefault_errorcode_mask:     .int    0x00000000
control_pagefault_errorcode_match:    .int    0xFFFFFFFF
control_CR3_target_count:             .int    0x00000002
control_VM_exit_controls:             .int    0x00036FFF
control_VM_exit_MSR_store_count:      .int    0x00000000
control_VM_exit_MSR_load_count:               .int    0x00000000
control_VM_entry_controls:            .int    0x000011FF
control_VM_entry_MSR_load_count:      .int    0x00000000
control_VM_entry_interruption_info:   .int    0x00000000
control_VM_entry_exception_errorcode: .int    0x00000000
control_VM_entry_instruction_length:  .int    0x00000000
control_Task_PRivilege_Threshold:     .int    0x00000000
# Natural 64-bit Control fields   
control_CR0_mask:                       .int    0x80000021                      
control_CR4_mask:                       .int    0x00002000
control_CR0_shadow:                   .int    0x80000021
control_CR4_shadow:                   .int    0x00002000
control_CR3_target0:                  .int    guest_PGDIR + ARENA     
control_CR3_target1:                    .int    host_level4 + ARENA
control_CR3_target2:                 .int    0x00000000
control_CR3_target3:                  .int    0x00000000
# Full 64-bit Control fields
control_IO_BitmapA_address_full:      .int    0x00000000      
control_IO_BitmapA_address_high:        .int    0x00000000
control_IO_BitmapB_address_full:      .int    0x00000000
control_IO_BitmapB_address_high:      .int    0x00000000
control_MSR_Bitmaps_address_full:     .int    0x00000000
control_MSR_Bitmaps_address_high:     .int    0x00000000
control_VMexit_MSR_store_address_full:        .int    0x00000000
control_VMexit_MSR_store_address_high:        .int    0x00000000
control_VMexit_MSR_load_address_full: .int    0x00000000
control_VMexit_MSR_load_address_high: .int    0x00000000
control_VMentry_MSR_load_address_full:        .int    0x00000000
control_VMentry_MSR_load_address_high:        .int    0x00000000
control_Executive_VMCS_pointer_full:  .int    0x00000000
control_Executive_VMCS_pointer_high:  .int    0x00000000
control_TSC_offset_full:              .int    0x00000000
control_TSC_offset_high:              .int    0x00000000
control_virtual_APIC_page_address_full:       .int    0x00000000
control_virtual_APIC_page_address_high:       .int    0x00000000
#------------------------------------------------------------------
# Natural 32-bit Read-Only fields
info_vmxinstr_error:                      .int    0
info_vmexit_reason:                    .int    0
info_vmexit_interrupt_information:     .int    0
info_vmexit_interrupt_error_code:      .int    0
info_IDT_vectoring_information:                .int    0
info_IDT_vectoring_error_code:         .int    0
info_vmexit_instruction_length:                .int    0
info_vmx_instruction_information:      .int    0
# Natural 64-bit Read-Only fields
info_exit_qualification:          .quad   0
info_IO_RCX:                           .quad   0
info_IO_RSI:                           .quad   0
info_IO_RDI:                           .quad   0
info_IO_RIP:                           .quad   0
info_guest_linear_address:             .quad   0
#------------------------------------------------------------------

    



vmxstep1.s
Code:
.global        guest_TSS, guest_limTSS, guest_selTSS
       .global guest_LDT, guest_limLDT, guest_selLDT
       .global guest_GDT, guest_limGDT 
    .global guest_IDT, guest_limIDT 
    .global guest_selCS0, guest_selDS0 
 .global guest_selES0, guest_selFS0 
 .global guest_PGDIR, guest_TOS0, guest_TOS3
 .global guest_task, guest_isrGPF

        .section        .bss
        .align  16
#------------------------------------------------------------------
   .space  512
guest_TOS3:
#------------------------------------------------------------------
       .space  512
guest_TOS0:
#------------------------------------------------------------------

   .section        .data
#------------------------------------------------------------------
guest_TSS:  
    .long   0, guest_TOS0, guest_selDS0
 .space  22 * 4
      .word   0, IOBASE - guest_TSS
       .zero   0x20
IOBASE:     .zero   0x2000
      .byte   0xFF
        .equ    guest_limTSS, (. - guest_TSS)-1
#------------------------------------------------------------------
guest_GDT:
    .quad   0x0000000000000000

      .equ    guest_selTSS, (. - guest_TSS)+0
     .word   guest_limTSS, guest_TSS, 0x8B01, 0

      .equ    guest_selLDT, (. - guest_LDT)+0
     .word   guest_limLDT, guest_LDT, 0x8201, 0

      .equ    guest_limGDT, (. - guest_GDT)-1
#------------------------------------------------------------------
#------------------------------------------------------------------
guest_LDT:

 .equ    guest_selCS0, (. - guest_LDT)+4
     .quad   0x00409A010000FFFF

      .equ    guest_selDS0, (. - guest_LDT)+4
     .quad   0x004092010000FFFF

      .equ    guest_selES0, (. - guest_LDT)+4
     .quad   0x0040920B8000FFFF

      .equ    guest_selFS0, (. - guest_LDT)+4
     .quad   0x00CF92000000FFFF

      .equ    guest_limLDT, (. - guest_LDT)-1
#------------------------------------------------------------------
guest_IDT:
    .space  13 * 8

  # interrupt-gate for General Protection Exceptions
  .word   guest_isrGPF, guest_selCS0, 0x8E00, 0

   .space  18 * 8
      .equ    guest_limIDT, (. - guest_IDT)-1
#------------------------------------------------------------------
      .align  0x1000
#------------------------------------------------------------------
guest_PGDIR:
   .long   0x00000087
  .zero   1023 * 4
#------------------------------------------------------------------


     .section        .text
#------------------------------------------------------------------
guest_msg1: 
    .ascii  "\033[2J\033[10;30H"
    .ascii  " Hello from Guest VM "
   .ascii  "\033[12;33H"
        .ascii  " CR0="
msw:   .ascii  "xxxxxxxx "
       .asciz  "\033[23;1H\n         " 
#------------------------------------------------------------------
guest_task:
  .code16                         # for Virtual-8086 mode

 # format image from system-register MSW (aka CR0)
   mov     %cs, %ax
    mov     %ax, %ds
    smsw    %eax
        lea     msw, %di
    mov     $8, %cx
nxrol:   rol     $4, %eax
    mov     %al, %bl
    and     $0xF, %bx
   mov     digit(%bx), %dl
     mov     %dl, (%di)
  inc     %di
 loop    nxrol

   # initialize the serial-UART (115200-baud, 8-N-1)
   .equ    UART, 0x03F8
        mov     $UART+3, %dx
        in      %dx, %al
    or      $0x80, %al
  out     %al, %dx
    mov     $UART+0, %dx
        mov     $0x0001, %ax
        out     %ax, %dx
    mov     $UART+3, %dx
        mov     $0x03, %al
  out     %al, %dx

        # transmit message-string via UART in "polled" mode
       xor     %si, %si
nxbyte: mov     $UART+5, %dx
        in      %dx, %al
    test    $0x20, %al
  jz      nxbyte
      mov     guest_msg1(%si), %al
        or      %al, %al
    jz      issent
      mov     $UART+0, %dx
        out     %al, %dx
    inc     %si
 jmp     nxbyte
issent:   in      %dx, %al
    test    $0x40, %al
  jz      issent

  # transmit extra 'null' byte (to restart UART timer)
      mov     $UART+0, %dx
        xor     %al, %al
    out     %al, %dx

        # now try to execute a 'privileged' instruction
   hlt
#------------------------------------------------------------------
digit:        .ascii  "0123456789ABCDEF"    # array of hex numerals
#------------------------------------------------------------------
guest_isrGPF:
 .code32
     vmcall
#------------------------------------------------------------------

    


vmxstep2.s
Code:
# manifest constant
   .equ    ARENA, 0x10000          # program 'load-address'


  # list of the exported symbols
      .global host_TOS0, host_level4
      .global host_TSS, host_GDT, host_IDT
        .global host_selCS0, host_selDS0, host_selTSS
       .global host_task, theVMM, ARENA


    # list of the imported symbols
      .extern fin, machine, ELEMENTS, results, ROCOUNT        


    .section        .bss
#------------------------------------------------------------------
msr0x480:    .space  88
#------------------------------------------------------------------
   .align  16
  .space  512
host_TOS0:
#------------------------------------------------------------------


        .section        .data
#------------------------------------------------------------------
host_TSS:
       .space  26 * 4

  .equ    host_limTSS, (. - host_TSS)-1
#------------------------------------------------------------------
host_IDT:
       .space  13 * 16

 # interrupt-gate for General Protection Exceptions
  .short  host_isrGPF, host_selCS0, 0x8E00, 0, 0,0,0,0

    .space  18 * 16
     .equ    host_limIDT, (. - host_IDT)-1
#------------------------------------------------------------------
#------------------------------------------------------------------
host_GDT:
        .quad   0x0000000000000000

      .equ    host_sel_cs, (. - host_GDT)+0
       .quad   0x00009A010000FFFF

      .equ    host_sel_ds, (. - host_GDT)+0
       .quad   0x000092010000FFFF

      .equ    host_selCS0, (. - host_GDT)+0
       .quad   0x00209A0000000000

      .equ    host_selDS0, (. - host_GDT)+0
       .quad   0x008F92000000FFFF

      .equ    host_selTSS, (. - host_GDT)+0
       .word   host_limTSS, host_TSS, 0x8B01, 0, 0,0,0,0

       .equ    host_gate64, (. - host_GDT)+0
       .word   host_task, host_selCS0, 0x8C00, 0, 0,0,0,0

      .equ    host_limGDT, (. - host_GDT)-1
#------------------------------------------------------------------
        .align  0x1000
#------------------------------------------------------------------
host_level1:
   entry = ARENA
       .rept   16
  .quad   entry + 0x003
       entry = entry + 0x1000
      .endr

   entry = ARENA
       .rept   240
 .quad   entry + 0x003
       entry = entry + 0x1000
      .endr

   .align  0x1000
#------------------------------------------------------------------
host_level2:
   .quad   host_level1 + ARENA + 0x003
 .space  511 * 8
#------------------------------------------------------------------
host_level3:
  .quad   host_level2 + ARENA + 0x003
 .space  511 * 8
#------------------------------------------------------------------
host_level4:
  .quad   host_level3 + ARENA + 0x003
 .space  511 * 8
#------------------------------------------------------------------
vmcs0:    .zero   0x1000
vmcs1:    .zero   0x1000
#------------------------------------------------------------------
#------------------------------------------------------------------
vmxon_region:       .quad   vmcs0 + ARENA
guest_region:      .quad   vmcs1 + ARENA
#------------------------------------------------------------------

    .section        .text
#------------------------------------------------------------------
host_task:
      .code64

 # turn on A20-line
  in      $0x92, %al
  or      $0x02, %al
  out     %al, $0x92

      # read the VMX-Capabality MSRs
      xor     %rbx, %rbx
  mov     $0x480, %ecx
nxmsr:      rdmsr
       mov     %eax, msr0x480+0(, %rbx, 4)     
    mov     %edx, msr0x480+4(, %rbx, 4)     
    inc     %ecx
        inc     %rbx
        cmp     $11, %rbx
   jb      nxmsr

   # initialize the two VMCS regions
   mov     msr0x480, %eax
      mov     %eax, vmcs0
 mov     %eax, vmcs1

     # Enter VMX Operation (and establish the Host's VMCS)
      vmxon   vmxon_region
        jc      xxx
 jz      yyy

     # Clear the VMCS region to be used by our Guest VM
  vmclear guest_region
        jc      xxx
 jz      yyy

     # Establish our Guest's VMCS as the 'current' VM
 vmptrld guest_region
        jc      xxx
 jz      yyy

     # loop to initialize VMCS components for the current VM
     xor     %rdx, %rdx
  mov     $ELEMENTS, %rcx
nxvwr:   mov     machine+0(%rdx), %eax   # encoding
  mov     machine+4(%rdx), %ebx   # location
  vmwrite (%ebx), %rax
        jc      xxx
 jz      yyy
 add     $8, %rdx
    loop    nxvwr

   # Now try to initiate execution of the Guest VM
     vmlaunch

        # if unsuccessful, then leave VMX Operation and exit
yyy:        vmxoff
xxx:      int     $0

theVMM:   # this is where 'Host' gains control when 'Guest' exits 
        push    %rax
        push    %rbx
        push    %rcx
        push    %rdx

    # loop to extract read-only information from current VMCS
   xor     %rdx, %rdx
  mov     $ROCOUNT, %rcx
nxvrd:    mov     results+0(%rdx), %eax   # encoding
  mov     results+4(%rdx), %ebx   # location
  vmread  %rax, (%ebx)
        add     $8, %rdx
    loop    nxvrd

   # display a report about the VM exit
        call    host_report

     pop     %rdx
        pop     %rcx
        pop     %rbx
        pop     %rax

    #-- this is temporary (initial demo never reenters VM) --
   vmxoff
      ljmp    *depart
     #--------------------------------------------------------       

        vmresume
#------------------------------------------------------------------
msg2:    .ascii  " VMexit-Reason: "
buf2:   .ascii  "xxxxxxxxxxxxxxxx (hex) "
len2:        .quad   . - msg2
att2:   .byte   0x50
#------------------------------------------------------------------
host_report:
     .code64

 mov     info_vmexit_reason, %rax
    lea     buf2, %rdi
  call    rax2hex

 mov     $16, %rax
   imul    $160, %rax, %rdi
    add     $0xB8000, %rdi
      cld
 lea     msg2, %rsi
  mov     len2, %rcx
  mov     att2, %ah
.R0:   lodsb
       stosw
       loop    .R0

     ret
#------------------------------------------------------------------
host_isrGPF:
      .code64

 # our fault-handler for General Protection Exceptions 
      push    %rax    
    push    %rbx    
    push    %rcx    
    push    %rdx    
    push    %rsp    
    addq    $40, (%rsp)     
    push    %rbp    
    push    %rsi    
    push    %rdi    

        pushq   $0                              
    mov     %ds, (%rsp)             # store DS 
 pushq   $0                              
    mov     %es, (%rsp)             # store ES 
 pushq   $0                              
    mov     %fs, (%rsp)             # store FS 
 pushq   $0                              
    mov     %gs, (%rsp)             # store GS 
 pushq   $0                              
    mov     %ss, (%rsp)             # store SS 
 pushq   $0                              
    mov     %cs, (%rsp)             # store CS 

     xor     %rbx, %rbx              # initialize element-index 
nxelt: 
  # place element-name in buffer 
     mov     names(, %rbx, 4), %eax  
    mov     %eax, buf 

      # place element-value in buffer 
    mov     (%rsp, %rbx, 8), %rax 
      lea     buf+5, %rdi 
        call    rax2hex 

        # compute element-location in RDI 
  mov     $23, %rax 
  sub     %rbx, %rax 
 imul    $160, %rax, %rdi 
   add     $0xB8000, %rdi 
     add     $110, %rdi 

     # draw buffer-contents to screen-location 
  cld 
        lea     buf, %rsi 
  mov     len, %rcx 
  mov     att, %ah  
nxpel:        lodsb 
      stosw 
      loop    nxpel 

  # advance the element-index 
        inc     %rbx 
       cmp     $N_ELTS, %rbx 
      jb      nxelt 

  # now transfer to demo finish 
      ljmp    *depart                 # indirect long jump 
#-------------------------------------------------------------------
depart:    .long   fin, host_sel_cs        # target for indirect jump 
#-------------------------------------------------------------------
hex: .ascii  "0123456789ABCDEF"    # array of hex digits
names:     .ascii  "  CS  SS  GS  FS  ES  DS" 
       .ascii  " RDI RSI RBP RSP RDX RCX RBX RAX" 
       .ascii  " err RIP  CS RFL RSP  SS" 
       .equ    N_ELTS, (. - names)/4   # number of elements 
buf:       .ascii  " nnn=xxxxxxxxxxxxxxxx "      # buffer for output 
len:        .quad   . - buf                 # length of output 
att: .byte   0x70                    # color attributes 
#-------------------------------------------------------------------
rax2hex: .code64 
        # converts value in EAX to hexadecimal string at DS:EDI 
        push    %rax 
       push    %rbx 
       push    %rcx 
       push    %rdx 
       push    %rdi 

   mov     $16, %rcx               # setup digit counter 
nxnyb:    rol     $4, %rax                # next nybble into AL 
      mov     %al, %bl                # copy nybble into BL 
      and     $0xF, %rbx              # isolate nybble's bits 
   mov     hex(%rbx), %dl          # lookup ascii-numeral 
     mov     %dl, (%rdi)             # put numeral into buf 
     inc     %rdi                    # advance buffer index 
     loop    nxnyb                   # back for next nybble

  pop     %rdi 
       pop     %rdx 
       pop     %rcx 
       pop     %rbx 
       pop     %rax 
       ret 
#-------------------------------------------------------------------

    


This is what I have ported to fasm so far. Let me know if I've got it all wrong:

Code:
; will add includes and extrns later


VMCS:

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 16-bit Guest State Fields    ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .guest_ES_selector          dw 0x0800
        .guest_CS_selector          dw 0x0802
        .guest_SS_selector          dw 0x0804
        .guest_DS_selector          dw 0x0806
        .guest_FS_selector          dw 0x0808
        .guest_GS_selector          dw 0x080A
        .guest_LDTR_selector        dw 0x080C
        .guest_TR_selector          dw 0x080E

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 32-bit Guest State Fields    ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .guest_ES_limit             dd 0x4800
        .guest_CS_limit             dd 0x4802
        .guest_SS_limit             dd 0x4804
        .guest_DS_limit             dd 0x4806
        .guest_FS_limit             dd 0x4808
        .guest_GS_limit             dd 0x480A
        .guest_LDTR_limit           dd 0x480C
        .guest_TR_limit             dd 0x480E
        .guest_GDTR_limit           dd 0x4810
        .guest_IDTR_limit           dd 0x4812
        .guest_ES_access_rights     dd 0x4814
        .guest_CS_access_rights     dd 0x4816
        .guest_SS_access_rights     dd 0x4818
        .guest_DS_access_rights     dd 0x481A
        .guest_FS_access_rights     dd 0x481C
        .guest_GS_access_rights     dd 0x481E
        .guest_LDTR_access_rights   dd 0x4820
        .guest_TR_access_rights     dd 0x4822
        .guest_interruptibility     dd 0x4824
        .guest_activity_state       dd 0x4826
        .guest_SMBASE               dd 0x4828
        .guest_SYSENTER_CS          dd 0x482A


;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 64-bit Guest State Fields    ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .guest_CR0                  dq 0x6800
        .guest_CR3                  dq 0x6802
        .guest_CR4                  dq 0x6804
        .guest_ES_base              dq 0x6806
        .guest_CS_base              dq 0x6808
        .guest_SS_base              dq 0x680A
        .guest_DS_base              dq 0x680C
        .guest_FS_base              dq 0x680E
        .guest_GS_base              dq 0x6810
        .guest_LDTR_base            dq 0x6812
        .guest_TR_base              dq 0x6814
        .guest_GDTR_base            dq 0x6816
        .guest_IDTR_base            dq 0x6818
        .guest_DR7                  dq 0x681A
        .guest_RSP                  dq 0x681C
        .guest_RIP                  dq 0x681E
        .guest_RFLAGS               dq 0x6820
        .guest_pending_debug_x      dq 0x6822
        .guest_SYSENTER_ESP         dq 0x6824
        .guest_SYSENTER_EIP         dq 0x6826

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                                   ^
; Full 64-bit Guest State Fields    ^
;                                   ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .guest_VMCS_link_pointer_full   dq 0x2800
        .guest_VMCS_link_pointer_high   dq 0x2801
        .guest_IA32_DEBUGCTL_full       dq 0x2802
        .guest_IA32_DEBUGCTL_high       dq 0x2803

;############## Host Machine ######################

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 16-bit Host State Fields     ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .host_ES_selector          dw 0x0C00
        .host_CS_selector          dw 0x0C02
        .host_SS_selector          dw 0x0C04
        .host_DS_selector          dw 0x0C06
        .host_FS_selector          dw 0x0C08
        .host_GS_selector          dw 0x0C0A
        .host_TR_selector          dw 0x0C0C

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 32-bit Host State Fields     ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .host_SYSENTER_CS          dd 0x4C00

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 64-bit Host State Fields     ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .host_CR0                  dq 0x6C00
        .host_CR3                  dq 0x6C02
        .host_CR4                  dq 0x6C04
        .host_FS_base              dq 0x6C06
        .host_GS_base              dq 0x6C08
        .host_TR_base              dq 0x6C0A
        .host_GDTR_base            dq 0x6C0C
        .host_IDTR_base            dq 0x6C0E
        .host_SYSENTER_ESP         dq 0x6C10
        .host_SYSENTER_EIP         dq 0x6C12
        .host_RSP                  dq 0x6C14
        .host_RIP                  dq 0x6C16


;############### Control ############################


;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 32-bit Contrrol Fields       ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .control_VMX_pin_based                  dd 0x4000
        .control_VMX_cpu_based                  dd 0x4002
        .control_exception_bitmap               dd 0x4004
        .control_pagefault_errorcode_mask       dd 0x4006
        .control_pagefault_errorcode_match      dd 0x4008
        .control_CR3_target_count               dd 0x400A
        .control_VM_exit_controls               dd 0x400C
        .control_VM_exit_MSR_store_count        dd 0x400E
        .control_VM_exit_MSR_load_count         dd 0x4010
        .control_VM_entry_controls              dd 0x4012
        .control_VM_entry_MSR_load_count        dd 0x4014
        .control_VM_entry_interruption_info     dd 0x4016
        .control_VM_entry_exception_errorcode   dd 0x4018
        .control_VM_entry_instruction_length    dd 0x401A
        .control_Task_PRivilege_Threshold       dd 0x401C


;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                              ^
; 64-bit Contrrol Fields       ^
;                              ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .control_CR0_mask                       dq 0x6000
        .control_CR4_mask                       dq 0x6002
        .control_CR0_shadow                     dq 0x6004
        .control_CR4_shadow                     dq 0x6006
        .control_CR3_target0                    dq 0x6008
        .control_CR3_target1                    dq 0x600A
        .control_CR3_target2                    dq 0x600C
        .control_CR3_target3                    dq 0x600E


;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                                   ^
; Full 64-bit Contrrol Fields       ^
;                                   ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .control_IO_BitmapA_address_full        dq 0x2000
        .control_IO_BitmapA_address_high        dq 0x2001
        .control_IO_BitmapB_address_full        dq 0x2002
        .control_IO_BitmapB_address_high        dq 0x2003
        .control_MSR_Bitmaps_address_full       dq 0x2004
        .control_MSR_Bitmaps_address_high       dq 0x2005
        .control_VMexit_MSR_store_address_full  dq 0x2006
        .control_VMexit_MSR_store_address_high  dq 0x2007
        .control_VMexit_MSR_load_address_full   dq 0x2008
        .control_VMexit_MSR_load_address_high   dq 0x2009
        .control_VMentry_MSR_load_address_full  dq 0x200A
        .control_VMentry_MSR_load_address_high  dq 0x200B
        .control_Executive_VMCS_pointer_full    dq 0x200C
        .control_Executive_VMCS_pointer_high    dq 0x200D
                                                dq 0x200E
                                                dq 0x200F
        .control_TSC_offset_full                dq 0x2010
        .control_TSC_offset_high                dq 0x2011
        .control_virtual_APIC_page_address_full dq 0x2012
        .control_virtual_APIC_page_address_high dq 0x2013

        ELEMENTS equ (. - VMCS)/8

;##################################################################
;##################################################################

results:

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                                   ^
; 32-bit Read-Only Data Fields      ^
;                                   ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .info_vmxinstr_error                    dd 0x4400
        .info_vmexit_reason                     dd 0x4402
        .info_vmexit_interrupt_information      dd 0x4404
        .info_vmexit_interrupt_error_code       dd 0x4406
        .info_IDT_vectoring_information         dd 0x4408
        .info_IDT_vectoring_error_code          dd 0x440A
        .info_vmexit_instruction_length         dd 0x440C
        .info_vmx_instruction_information       dd 0x441E

;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;                                   ^
; 64-bit Read-Only Data Fields      ^
;                                   ^
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

        .info_exit_qualification                dq 0x6400
        .info_IO_RCX                            dq 0x6402
        .info_IO_RSI                            dq 0x6404
        .info_IO_RDI                            dq 0x6406
        .info_IO_RIP                            dq 0x6408
        .info_guest_linear_address              dq 0x640A

        ROCOUNT equ (. - results)/8    
Post 23 May 2007, 00:57
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madmatt



Joined: 07 Oct 2003
Posts: 1045
Location: Michigan, USA
madmatt 23 May 2007, 07:54
You can use the "dup(?)" assembler directive to reserve space also. Here are some examples:

Code:
scanlinetable dd 2048 dup(?)
temp768       db 768 dup(0)
workpal PALETTEENTRY 
        db sizeof.PALETTEENTRY*255 dup(?)

struct D2DCustomVertex ;non-textured drawing
       x       dd ?
       y       dd ?
       z       dd ?
       rhw     dd ?
       diffuse dd ?
ends

d2dprimitive D2DCustomVertex
             db 2048 * (sizeof.D2DCustomVertex * 5) dup(?)

..and finally
db 3 dup ('abcd',0), ?, 7 dup '-'     
Post 23 May 2007, 07:54
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid 23 May 2007, 11:00
You got it all wrong Wink

GAS's .int is just like FASM's "dd". That means
Code:
.int 0x800, ABCD    
is
Code:
dd 0x800, ABCD    
not
Code:
ABCD dd 0x800    


In this case, this is array of two-dword entries. First dword is offset within VMCS, and second is value to this VMCS entry. VMCS is filled from this array in loop:
Code:
        # loop to initialize VMCS components for the current VM 
        xor     %rdx, %rdx 
        mov     $ELEMENTS, %rcx 
nxvwr:  mov     machine+0(%rdx), %eax   # encoding 
        mov     machine+4(%rdx), %ebx   # location 
        vmwrite (%ebx), %rax 
        jc      xxx 
        jz      yyy 
        add     $8, %rdx 
        loop    nxvwr    


Also
Code:
ELEMENTS equ (. - VMCS)/8     
should be
Code:
ELEMENTS = ($ - VMCS)/8    


.equ defines symbol, which is also later exported. FASM's "equ" is just for preprocessor's textual substitution

GAS's dot is same as fasm's "$" - current address.
Post 23 May 2007, 11:00
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HyperVista



Joined: 18 Apr 2005
Posts: 691
Location: Virginia, USA
HyperVista 23 May 2007, 11:36
Thanks vid and madmatt.

A question about carving out memory with "rb 6" vs dup(?). Do they both initialize the memory reserved with zeroes?

Also, in the following section of the code I'm porting, how would this look in fasm?

Code:
# Natural 16-bit Guest State fields 
guest_ES_selector:                      .short  0x0000   
guest_CS_selector:                      .short  ARENA >> 4 
guest_SS_selector:                      .short  ARENA >> 4 
guest_DS_selector:                      .short  0x0000 
guest_FS_selector:                      .short  0x0000 
guest_GS_selector:                      .short  0x0000 
guest_LDTR_selector:                    .short  guest_selLDT 
guest_TR_selector:                      .short  guest_selTSS 
    


would it be:
Code:
guest_ES_selector db 0x0000
.
.    


or

Code:
guest_ES_selector = 0x0000
.
.     


or ??
Post 23 May 2007, 11:36
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid 23 May 2007, 11:49
Quote:
A question about carving out memory with "rb 6" vs dup(?). Do they both initialize the memory reserved with zeroes?

both "rb 6" and "6 dup(?)" just reserve space. That means contents of reserved region are unknown. If you want zero-fill, you use this
Code:
db 6 dup(0)    
or this
Code:
times 6 db 0    
First one is probably better in terms of compilation speed, otherwise they are the same thing.

Quote:
Also, in the following section of the code I'm porting, how would this look in fasm?
[...]


.short is same as FASM's "dw".

FASM has "shr" operator instead of ">>".

So the code is:
Code:
; Natural 16-bit Guest State fields  
guest_ES_selector dw  0x0000    
guest_CS_selector dw  ARENA shr 4  
guest_SS_selector  dw ARENA shr 4  
guest_DS_selector dw 0x0000  
guest_FS_selector dw 0x0000  
guest_GS_selector dw 0x0000  
guest_LDTR_selector dw guest_selLDT  
guest_TR_selector dw guest_selTSS     
Post 23 May 2007, 11:49
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