revolution, although I think 99% of people who want SSE2 also expect SSE to be there, you do have a point.

And I've heard some chips don't even have all instructions (e.g. some VIA "686" without CMOV??). Even Intel in one of their manuals claimed "don't expect FPU to always be available on 586, always test CPUID" (although I don't know of any that didn't). Same with some early PPros (allegedly) not supporting CMOVs either, an old controversy that GCC ignores (for them, i686 always assumes CMOV). Even old Cyrix didn't support CPUID unless enabled via some MSRs. Oh, and don't forget the 80376 and conflicts like VIA C3 (MMX, 3dnow!) and C3-2 (MMX, SSE). (But you know 1000x more than me.)

Besides, maybe somebody wants FASM to ignore / warn upon accidental include / use of (slow) FPU in favor of SSE2 or disallow SSE in favor of 3dnow! or whatever.

In short, it doesn't really matter if it's not perfect (as nothing really is anyways).

with .386 I get:



when I use lahf.

Fixed. See the first post in this thread for the new file.

All your "features" macro does is prevent you from using CPU instructions that would otherwise be available. It does NOT allow you to choose a CPU like the title claims, it simply disables features.

My "opcode" macro is real LL. It CREATES/WRITES PURE machine code and can be used to make little compilers which I have. Only reason this post became "sticky" is because it has your name on it.