WithSet = {SSE, SSE2, SSE3, SSSE3, SSE4, FPU, FPU287, VMX, SVM, LahfSahf,...} ; The names as documented in CPUID docs plus some identifications for processors prior to CPUID existence (like "FPU")
.ProcessorName with=[comma/space separated elements from WithSet]    

; Recieves a list of instructions sets to be enabled
macro enable [args]{...}

.8086 macro [args]{

  enable 16bit_real

; process the extra options
}

.286 macro [args]{

  .8086
  enable 16bit_prot

}

.
.
.    

i8086 equ 16bit_real
i80286 equ i8086 16bit_prot
.
.
.
; User code

.enable Pentium4 EM64T LahfSahf    

A #UD exemption handler would be nice. One that emulates invalid intructions. Although you would have to be totaly insane to dedicate enough time to code it.

http://board.flatassembler.net/topic.php?t=4267
*3DNow and Enhanced 3DNow are disabled by other macros by default (with posibility to re-enable those instruction sets).

This is bad ... <snip other irrelevant text>

Where are the macros???

Code:

WithSet = {SSE, SSE2, SSE3, SSSE3, SSE4, FPU, FPU287, VMX, SVM, LahfSahf,...} ; The names as documented in CPUID docs plus some identifications for processors prior to CPUID existence (like "FPU")
.ProcessorName with=[comma/space separated elements from WithSet]    

This way the user chooses a processor and he will get a instruction set which is compatible with the most older version of the processor and with the "with=" option he can specify more support. About internal desing I think it could be something like this:

Code:

; Recieves a list of instructions sets to be enabled
macro enable [args]{...}

.8086 macro [args]{

  enable 16bit_real

; process the extra options
}

.286 macro [args]{

  .8086
  enable 16bit_prot

}

.
.
.    

To clarify, the idea is grouping instructions by feature rather than by processor and then, when you select a processor, the macro for that processor will enable the groups it supports. I don't know about the complexity of this idea though, I hope that it will not be a hard/impossible task. Other forum members please comment

.8086

irp instr,sar,sal,rcl,rcr,shr,shl,ror,rol { macro instr val,cnt \{ times cnt: instr val,1\} }    

ror ax,-1    

IF 64-Bit Mode and using REX.W
THEN
countMASK ← 3FH;
ELSE
countMASK ← 1FH;
FI
tempCOUNT ← (COUNT AND countMASK);

.286 macro [args]{

.8086
enable 16bit_prot

}

Also, for most AMD CPUs up to quiet recently, MMX, 3DNow! and 3DNow extended instructions are more optimized than the SSE instructions, thus simple MMX/3DNow! code may actually run faster than SSE code!

This is especially true for the K6, K6-2, K6-3, Athlon, Athlon XP and some older Athlon64.

features SSE, SSE2, SSE3, SSSE3, SSE4, FPU, FPU287, VMX, SVM, ...