Hello,

I have a very basic question related to machines architecture: I always wondered
how mapped memory was really managed... when writing/reading to mapped
memory do we really write/read the main memory (which implies that the related
device must poll periodically the mapped memory range to react accordingly,
and it seems very inefficient to me) or are write/read operations in fact
redirected to the device like it would be with the in/out instructions except that
we are not limited to the small addressing space of devices? or is there a third
option I did not think of?

Thank you in advance for your replies!

i think initially the memory is just reserved, and page gets loaded from file only when you access it. Changes are written back to file, when you close mapping.

I may have misunderstood your reply but I think you're speaking of the paging mechanism
whereas I'm speaking of mapped memory (allocated to hardware devices).
I give an example: writing a character to the screen in 'text' mode is made by writing its ascii
code somewhere in the range of mapped memory associated to the video adapter
[0xB800-...].
So what really happens with such an instruction? is it really written in RAM and accessed
later by the video adapter, or is it directly sent to the video adapter by some circuitry tricks?

I doubt the devices are doing polling, there's probably some bus magic involved... but that's just a guess.

Both CPU and video controller access the same memory.
This means that the buss is shared and speed is at least 1/2.

The video controller has priority since it has to read the memory in order to generate the on screen image. CPU is only allowed to write/read in between two video controller accesses.

That's it basically.

In reality it goes slightly more complicated than this because of optimizations, dual port memory, AGP/PCI buss and chip set controllers.

Please note that this video memory is in fact located on to the video board although it is "seen" by the CPU as being into it's own address space. A special decoder circuit will eliminate the normal RAM chips from the bus when the video memory range is selected and emit selection signals for the video memory instead.

Great, that's what I was wondering. So indeed the write/read operations on
mapped memory are not done on RAM but redirected to the device.

Thank you everyone for your replies.

As a subsidiary question:
I thought that mapped memory ranges could be tweaked, so it means the cirduit
responsible for (what I call) redirections is also programmable, right?

It can be mapped for PCI devices yes.

It must get "programmed" when setting video mode, but how exactly

You can "tweak" the CPU (>= Pentium 2) with "MTRR" for higher write
performance (and lower read reliability ?) ...

Ok, thank you.

I was just asking the last question by curiosity, I don't plan to change the mapped memory
ranges for my programs

But really, the PC architecture seems to be the result of engineers' nightmares
things could be so much simple...

How about entering/leaving protected or long mode just by one instruction.... Instead of tweaking this and that..

regards
Mac2004

[quote="Mac2004"]
Setting segments descriptors or things like the A20 gate to access the whole memory, this is so much fun, I worship IBM & Intel engineers

Not true.
Usually it is exactly as simple as possible under the circumstances.

You should blame the capitalistic management and not the engineers.
Even a 15 years old techno kid could make the electronics required. The problems raise from the money and capitalism. It simply does not pay to make things simpler and better and faster. But is does pay big to make them bloatware and more complicated.

An engineer needs money for a house and car and living and does not want to be homeless and die of hunger just to be able to "speak the truth" that nobody will hear anyway ...

It is payed by people that "think" things could be better in "new" designs - but of course they are not because the new designs are constraied by the exact same capitalistic rules as the previouse design- so he will do what the market requests.... and the market is always stupid.

In fact usualy in order to suuceed the first "obsolete" designs are idealistic and by essence much better than the "new" ones.





OK let us neow see some example for the above statements:

Segments descriptors are an evolution from the obsolete 1950 paging mechanisms. Unfortunately marked decided to drop them in favour of the much aclaimed "new" paging. So now in long mode they become an "annoyance" go figure...

A20 line is a backward compatiblility and a hack and an imcomplete design.
Rules of capitalism.

Somebody considered hacking 16bits addressing modes in order to get more than 1M or RAM on a chip that was supposed to accees only 1M in real mode (8086, 80286, etc)

The hack was possible because of an incomplete design: normally a 16bits data buss chip should have a 32bits address buss and hence be able to address more than 1M. Bu because of costs it was trimmed down to only 1M.
Later on when more than 1M was used A20 has to be placed as a protection and ON/OFF gate. Because of costs again it was placed in the "free bits" of the keyboard controller...

Anyway you are dreaming is you imagine that other hardware (new designs) are much better than this ... you will see... all hardware and all OS construction is about billions of hacks and understanding super complicated pointless designs

A20 is childs play...

For example take APM versus ACPI. APM is a plain simple and effective BIOS designa am implementation that works ok. Good luck with ACPI.

Then the PCI IRQ sharing versus normal IRQ. "older" boards have been able to manage and switch from one IRQ to another in order to avoid 2 boards and the same IRQ... new design...forgot to have enough IRQ lines (money economy) and now you have to share the IRQ... and it is acclaimed as "much better"...saves the money fouls the dreamers

BIOS versus EFI.
BIOS is another best humman technology that does not stand for money making... so let us drop it and instead add some over complicated DRM enhanced stuff... every dreamer will clap its hands...

USB stack pooling 1024 descriptors and waste/missuse of IRQ

Network boards using linked lists and moving buffers towards PCI buss

Oh dear the list is countless... no uses ... no excuses

Why should a huge corporations make things easy to implement for a 1 man power OS developer? So other garage OSes can emerge and make them loose profits? NO sir, this will not happen again!

It did happed with Apple in a garage and IBM lost. It did happen with Microsoft and Linux. Trust me it will not happen again.

You should in fact worship IBM and other engineers...because they are good and essentially idealistic scientists. You should understand that capitalism and your unclear dreams of better "tomorrow new designs" make the world what is is today.

But it is fun watching trust me

Any kind of technology the human race makes up, I will understand it completely and use it for my needs. But I will not "dream" that one is better than the other.

And BTW, YES you can and you should use MTTR in order to tweak CPU access to memory mapped areas of video boards. If you are lucky BIOS already did it for you at startup

Conceptually yes. In practice: "redirected" is the key word...

Redirected through complicated PCI/AGP/Express chipsets and buss... and yeah sooner or later they will reach the video board's memory

And do not even DARE reading from video memory