Tomasz - I know you've already included suport for AMD's SVM. Is it possible to include in future release of fasm the ten (10) Intel VMX Instructions? The ten instructions and their opcodes can be found in Intels Programmer's Manual 2B (Instructions N-Z, pages 384 - 413). The instructions are:

VMPTRLD
VMPTRST
VMCLEAR
VMREAD
VMWRITE
VMCALL
VMLAUNCH
VMRESUME
VMXOFF
VMXON

I'm making progress on my fasm based hypervisor and having these Intel VMX instructions included in fasm would be a great thing! Thank you for your consideration.

HyperVista: don't you use some old version of FASM? These insruction ARE supported by FASM

i've been using fasmw 1.67.12 (Oct 06). i get "invalid operand" on the VMX instructions i'm testing during compile. before writing my note last night, i checked the "what's new" file on the latest version and couldn't find reference to VMX instructions being included in any fasm version. i did see a reference to AMD SVM being added last year, but no mention of Intel VMX, and given my compile errors, assumed they weren't yet included.
i loaded up the newest version and had the same "invalid operand" error message .... hmmmm.
then i tried some of the other VMX instructions and they compile .... yeah .... Intel VMX is in fact included in fasm.... thank you very much Tomasz!!

it seems the VMX instructions i'm having difficulty with are those that require a 64-bit memory operand. Per the Intel Developer's Manual, the instructions should follow the format:

VMXON m64
VMCLEAR m64
VMPTRLD m64
etc.

the operands for these instructions are always 64-bit and always in memory. these 64-bit memory addresses are pointers to the VMCS region. these 64-bit pointers need to be 4Kb alligned (bits 11:0 must be zero).
my question is, how should i be providing this m64 operand in fasm? i've tried providing a 64-bit immediate hex adress but still get the "invalid operand" error message.

what's the recommended method in fasm to provide a 64-bit memory address as an operand?

thanks!

my question then is, how do i properly provide a 64-bit memory operand for these instructions.

The simplest examples:

As for the WHATSNEW.TXT, it mentions the addition of VMX in version 1.62 (and it also notes that the syntax for those instructions is not yet documented, it's perhaps a high time for me to add those sections to manual).

Thank you very much Tomasz. That worked.

Yes, I found the inclusion of VMX way back in version 1.62 (Spring 2005!!!). Tomasz, you are truly a man ahead of your time.

It's very gracious of you to take your busy time to help me and I appreciate it very much.

tomasz: maybe you could also check if operands are properly aligned...

If aligment for those instructions is checked, then "movaps xmm0, [anyAddr or 1]" should throw error too. I'm not sure if that is a good feature, maybe for some reason I'm interested in generate a unaligment fault.

I can't see why the assembler should check for alignment on these instructions - especially since it can't do it anyway as soon as there's a dynamic part in the instruction (ie., register usage), which is probably the form people will be using most of the time anyway.

yes, you are right