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Index > Compiler Internals > automatic size for BTx instruction?

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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
could FASM automatically decide shortest encoding for bt, bts, btr, btc instructions? So that i wouldn't have to specify size in "bt [eax], 0"?

I think this shouldn't be problem for everyday usage, only problem could be accessing more memory, and this is very hard to predict when using BTx instructions.

Like, which bytes are accessed by bt dword [FFBh], 33 ?
Post 30 Jan 2007, 15:42
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MazeGen



Joined: 06 Oct 2003
Posts: 975
Location: Czechoslovakia
MazeGen
vid wrote:
Like, which bytes are accessed by bt dword [FFBh], 33 ?
Intel manual wrote:
When accessing a bit in memory, the processor may access 4 bytes starting from the
memory address for a 32-bit operand size, using by the following relationship:
Effective Address + (4 ∗ (BitOffset DIV 32))
Or, it may access 2 bytes starting from the memory address for a 16-bit operand,
using this relationship:
Effective Address + (2 ∗ (BitOffset DIV 16))
It may do so even when only a single byte needs to be accessed to reach the given
bit. When using this bit addressing mechanism, software should avoid referencing
areas of memory close to address space holes. In particular, it should avoid references
to memory-mapped I/O registers. Instead, software should use the MOV
instructions to load from or store to these addresses, and use the register form of
these instructions to manipulate the data.
Post 31 Jan 2007, 08:50
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