Get it here:

ftp://download.intel.com/technology/architecture/new-instructions-paper.pdf

Of course opcodes are yet confidential?

well... both FASM and YASM already have SSSE3 / SSE4 support

Interesting expansions. Commands for work with strings can be very useful. I think, that it's necessary to add support of these commands in FASM.

vid: SSSE3 is not SSE4.

so this SSE4 is *not* SSSE3? some real SSE4 this time? wow

Hi Tomasz, here ya go: http://www.intel.com/design/processor/manuals/253667.pdf
&
http://developer.intel.com/design/processor/manuals/253666.pdf

Whoops, a quick look and those instructions from the white paper are not in here, bummer!

Sorry if the title confused people. I didn't mean to suggest that the opcodes had been published. Maybe a moderator can change the title to "SSE4 white paper is now available from Intel".

Anyhow the new instructions are not particularly exciting unless you happen to be programming in a specific field that can make use of them. The dot product and rounding instructions look to be the most useful. Maybe the string functions that mentions ZLIB as benefitting could also be worthwhile.

Packed multiply with 32bit and 64bit is great, something I've personally wanted.

CRC32 opcode sounds like it would be very useful. I'll hold my final judgements until the performance and latency data is available.

I can see why dot product is being added, might as well already have it in the architecture when we start seeing CPU/GPU combo processors in a few years.

WHAT I STILL WANT:
PLB/PLW/PLD/PLDQ packed load byte/word/dword/qword - replacing the addresses stored in the XMM register with the data at those addresses.
Parallel random access to memory data would rock. Imagaine being able to do multiple look ups on multiple LUTs at the same time that would be incredibly useful.
This combined with packed multiply and packed add for the address would be so cool.

Shame I don't design microprocessors :/

You can. Get a FPGA board and learn Verilog.

sure, but not everyone has time/money to do so

Hmm, CRC32 opcode seems pretty silly to me - it's pretty blazing fast already with a LUT implementation. Where would this be useful? Outside of networking, where it really should be moved onto the NIC. Ok, intel mentions iSCSI and RDMA, but ho humm.

CISC all the way!