Detecting CPU types

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Matrix

Joined: 04 Sep 2004
Posts: 1166
Location: Overflow

Matrix 17 Oct 2004, 03:37

Hello all,
do you think it is neccesary to detect if your computer is a
8086 or greater
80186 or greater
80286 or greater
80386 or greater
80486 or greater
80586 or greater
80686 or greater
or so on?

on some applications they're still people who are using old processors/computers

however i have seen most of the programmers like using SSE MMX KNI SSE2 and so on. What for?
that few percent from SSE will not save a 3d game
it will most likely depend on MIPS, memory throughput, and especially video ram speed.

ps.: i just saw an interesting way to determine if 80387 or older Smile

Code:


;If an 8087/80287 program uses the denormal exception to automatically
;normalize denormal operands, then that program can run on an 80387 by
;masking the denormal exception. The 8087/80287 denormal exception handler
;would not be used by the 80387 in this case. A numerics program runs faster
;when the 80387 performs normalization of denormal operands. A program can
;detect at run-time whether it is running on an 80387 or 8087/80287 and
;disable the denormal exception when an 80387 is used. The following code
;sequence is recommended to distinguish between an 80387 and an  8087/80287.

      FINIT              ; Use default infinity mode:
                         ;  projective for 8087/80287,
                         ;  affine for 80387
      FLD1               ; Generate infinty
      FLDZ
      FDIV
      FLD    ST   
                         ; Form negative infinity
      FCHS
      FCOMPP             ; Compare +infinity with -infinity
      FSTSW  temp        ; 8087/80287 will say they are equal
      MOV    AX, temp
      SAHF
      JNZ    Using_80387

;The denormal-operand exception of the 80387 permits emulation of arithmetic
;on unnormal operands as provided by the 8087/80287. The standard does not
;require the denormal exception nor does it recognize the unnormal data type.

17 Oct 2004, 03:37

decard

Joined: 11 Sep 2003
Posts: 1092
Location: Poland

decard 18 Oct 2004, 12:16

the code is nice, but don't you think that when you are determining if CPU is 386 or higher, you should consider the case when FPU isn't available?

18 Oct 2004, 12:16

Matrix

Joined: 04 Sep 2004
Posts: 1166
Location: Overflow

Matrix 19 Oct 2004, 12:04

yeah, you're right,
i didn't mean that, the code distinguishes 80387 or better from 80287 or lower,

i have some codes around here somewhere for cpu detection.
however i haven't used them yet.

i assumed everyone has at least a 486 system, and when i was using RDTSC i assumed everyone has at least a pentium who uses my program.

19 Oct 2004, 12:04

roticv

Joined: 19 Jun 2003
Posts: 374
Location: Singapore

roticv 19 Oct 2004, 12:14

Code:

      pushfd
      or      byte[esp+2],32
      popfd
       pushfd
      pop     eax
 shr     eax, 22
     jnc     nocpuid
     xor     eax, eax
    inc     eax
 cpuid

19 Oct 2004, 12:14

Matrix

Joined: 04 Sep 2004
Posts: 1166
Location: Overflow

Matrix 13 Nov 2004, 06:30

what do you think of my cpuID program?
its not fully optimized, but 2730 bytes in com and should detect from 8086, here's a screenshot:

Code:

Your CPU is: Protected Mode Pentium Pro Class GenuineIntel Processor
cpuID Level: 2 - Type:Original OEM Processor
 Model:6 Stepping:8 Revision:6
Capabilities:
MMX Technology                          CMOV-Cond. Move/Cmp. Inst.
MCA-Machine Check Arch.                 PGE-PTE Global Bit
MTRR-Mem. Type Range Reg.               CXS-CMPXCHG8B Inst.
MCE-Machine Check Exception             PAE-Physical Address Extensions
MSR-RDMSR and WRMSR Support             TSC-Time Stamp Counter
PSE-Page Size Extensions                DE-Debugging Extensions
VME-Virtual-8086 Mode Enhancement       FPU-FPU on Chip

Not supported:
APIC-APIC on Chip
Processor internals: - Instruction TLB: 4K-Byte Pages, 4-way set associative, 32
 entries - Instruction TLB: 4M-Byte Pages, 4-way set associative, 4 entries - Da
ta TLB: 4K-Byte Pages, 4-way set associative, 64 entries - L1 Instruction cache:
 16K Bytes, 4-way set associative, 32 byte line size - Data TLB: 4M-Byte Pages,
4-way set associative, 8 entries - L1 Data cache: 16K Bytes, 2-way set associati
ve, 32 byte line size - Unified L2 cache: 128K Bytes, 4-way set associative, 32
byte line size<---- Matrix cpuID 007 is waiting for a key to exit ---->

Description:	Matrix cpuID 007 with source code (works under dos too ! :)	Download
Filename:	CPUID.RAR
Filesize:	7.39 KB
Downloaded:	641 Time(s)

13 Nov 2004, 06:30

Matrix

Joined: 04 Sep 2004
Posts: 1166
Location: Overflow

Matrix 13 Nov 2004, 08:12

new version, hope it fits in 80x25 everyone Smile

now shows nearly all of intel processors' features, 2996 bytes in com

i guess no more fits on the 80x25 like this

screenshot:

Code:

Your CPU is: Protected Mode Pentium Pro Class GenuineIntel Processor
cpuID Level: 2 - Type:Original OEM Processor Model:6 Stepping:8 Revision:6
Capabilities:
XMM-SSE (SIMD)-P3                       FXSR (FXSAVE/FXRSTOR)
MMX Technology                          36-bit Page Size Extension
Page Attribute Table                    CMOV-Cond. Move/Cmp. Inst.
MCA-Machine Check Arch.                 PGE-PTE Global Bit
MTRR-Mem. Type Range Reg.               SEP-SYSENTER/SYSEXIT(fast system call)
CXS-CMPXCHG8B Inst.                     MCE-Machine Check Exception
PAE-Physical Address Extensions         MSR-RDMSR and WRMSR Support
TSC-Time Stamp Counter                  PSE-Page Size Extensions
DE-Debugging Extensions                 VME-Virtual-8086 Mode Enhancement
FPU-FPU on Chip
Not supported:
Thermal Monitor                         Self-Snoop
SSE2-Streaming SIMD Extensions 2        Thermal Monitor&Sw Controlled Clock
Debug Store                             CLFLUSH Instruction
Processor serial number                 APIC-APIC on Chip
internals: - Instruction TLB: 4K-Byte Pages, 4-way set associative, 32 entries -
 Instruction TLB: 4M-Byte Pages, 4-way set associative, 4 entries - Data TLB: 4K
-Byte Pages, 4-way set associative, 64 entries - L1 Instruction cache: 16K Bytes
, 4-way set associative, 32 byte line size - Data TLB: 4M-Byte Pages, 4-way set
associative, 8 entries - L1 Data cache: 16K Bytes, 2-way set associative, 32 byt
e line size - Unified L2 cache: 128K Bytes, 4-way set associative, 32 byte line
size<---- Matrix cpuID 008 is waiting for a key to exit ---->

Description:	Matrix cpuID 008 with full source code	Download
Filename:	Cpuid008.rar
Filesize:	7.98 KB
Downloaded:	610 Time(s)

13 Nov 2004, 08:12

Matrix

Joined: 04 Sep 2004
Posts: 1166
Location: Overflow

Matrix 13 Nov 2004, 09:19

thnx to intel, my code is full of text, i could have made a better cpuID function

well ...

now 5661 bytes in com, 23700 bytes in asm, and new internals added for intel processors. maeby a little shorter descriptions

Code:

Your CPU is: Protected Mode Pentium Pro Class GenuineIntel Processor
cpuID Level: 2 - Type:Original OEM Processor Model:6 Stepping:8 Revision:6
Capabilities:
XMM-SSE (SIMD)-P3                       FXSR (FXSAVE/FXRSTOR)
MMX Technology                          36-bit Page Size Extension
Page Attribute Table                    CMOV-Cond. Move/Cmp. Inst.
MCA-Machine Check Arch.                 PGE-PTE Global Bit
MTRR-Mem. Type Range Reg.               SEP-SYSENTER/SYSEXIT(fast system call)
CXS-CMPXCHG8B Inst.                     MCE-Machine Check Exception
PAE-Physical Address Extensions         MSR-RDMSR and WRMSR Support
TSC-Time Stamp Counter                  PSE-Page Size Extensions
DE-Debugging Extensions                 VME-Virtual-8086 Mode Enhancement
FPU-FPU on Chip
Not supported:
Thermal Monitor                         Self-Snoop
SSE2-Streaming SIMD Extensions 2        Thermal Monitor&Sw Controlled Clock
Debug Store                             CLFLUSH Instruction
Processor serial number                 APIC-APIC on Chip
internals: - Instruction TLB: 4-KBPages, 4-way set associative, 32 entries - Ins
truction TLB: 4-MB Pages, fully associative, 2 entries - Data TLB: 4-KB Pages, 4
-way set associative, 64 entries - L1 instruction cache: 16-KB, 4-way set associ
ative, 32-byte line size - Data TLB: 4-MB Pages, 4-way set associative, 8 entrie
s - L1 data cache: 16-KB, 4-way set associative, 32-byte line size - L2 cache: 1
28-KB, 4-way set associative, 32-byte line size<---- Matrix cpuID 009 is waiting
 for a key to exit ---->

Description:	Matrix cpuID 009 with full source code	Download
Filename:	Cpuid009.rar
Filesize:	8.96 KB
Downloaded:	712 Time(s)

13 Nov 2004, 09:19

Adam Kachwalla

Joined: 01 Apr 2006
Posts: 150

Adam Kachwalla 22 Sep 2006, 11:50

Cannot access any of your RAR files: I get a CRC error

22 Sep 2006, 11:50

Vasilev Vjacheslav

Joined: 11 Aug 2004
Posts: 392

Vasilev Vjacheslav 23 Sep 2006, 15:00

Adam Kachwalla, try to use newer winrar

23 Sep 2006, 15:00

rugxulo

Joined: 09 Aug 2005
Posts: 2341
Location: Usono (aka, USA)

rugxulo 24 Sep 2006, 00:17

Matrix, if you're concerned about the .COM filesize, use aPACK or UPX or something.

BTW, there are three fixes for the 25-lines limit:

count each line before printing, pausing at line 20 or so
switch to 80x50 upon startup:
Code:
```
mov ax,1112h
xor bx,bx
int 10h
    
```
don't worry about it, let people pipe | the output into MORE

P.S. Get UNRAR for DOS, if you need it. Smile

24 Sep 2006, 00:17

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