sine cosine tangent ?

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fasm9

Joined: 19 Jun 2003
Posts: 439

fasm9 19 Oct 2003, 10:46

in fasm, how these function can be expressed?

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19 Oct 2003, 10:46

scientica
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Joined: 16 Jun 2003
Posts: 689
Location: Linköping, Sweden

scientica 19 Oct 2003, 11:47

Could you please elaborate? Are you asking for the definition of these trinometirc funcitons? Or are you looking for some instruction like FSIN, FSINCOS and FPATAN, FPTAN?

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... a professor saying: "use this proprietary software to learn computer science" is the same as English professor handing you a copy of Shakespeare and saying: "use this book to learn Shakespeare without opening the book itself.
- Bradley Kuhn

19 Oct 2003, 11:47

roticv

Joined: 19 Jun 2003
Posts: 374
Location: Singapore

roticv 19 Oct 2003, 14:32

Using fpu. Very Happy

19 Oct 2003, 14:32

fasm9

Joined: 19 Jun 2003
Posts: 439

fasm9 19 Oct 2003, 20:49

Thanks, but i don't know. some example please? Both.

is this built-in command? instruction? (;))
i want to know how intel build these FSIN, FSINCOS, FPATAN, FPTAN from machine code, the origin..

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Last edited by fasm9 on 20 Oct 2003, 21:38; edited 1 time in total

19 Oct 2003, 20:49

vid
Verbosity in development

Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia

vid 20 Oct 2003, 05:50

they are normal FPU instruction. look at http://webster.cs.ucr.edu/Page_AoAWin/0_AoAHLAWin.html, chapter 11

20 Oct 2003, 05:50

MazeGen

Joined: 06 Oct 2003
Posts: 977
Location: Czechoslovakia

MazeGen 20 Oct 2003, 17:45

fasm9 wrote:

is this built-in command? instruction? ()
i want how intel build these FSIN, FSINCOS, FPATAN, FPTAN from machine code, the origin..

Do you mean, how are these instructions implemented physically in the processor, or how are machine codes of these instructions?

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20 Oct 2003, 17:45

fasm9

Joined: 19 Jun 2003
Posts: 439

fasm9 20 Oct 2003, 21:37

whatever! everything about it,
but img, some of it maybe secret. opening one-secret, amplify to break whole secret (bleh)

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btw, why we can't modify or see the intel p4 microcode(which is not encrypted.)?

20 Oct 2003, 21:37

scientica
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Location: Linköping, Sweden

scientica 21 Oct 2003, 05:25

The mircocode are (IIRC) ÂµOps, which enables programmers to to some extent, make their own instructions (P4 be a CISC proceccor with RISC instructions). In short you can make make an CISC instruciton via the ÂµOp RISC instrucitons. I'm don't that mucha bout it, but my guess is that some linux guru migth know it (my red hat (tries to) updates the microcode).

21 Oct 2003, 05:25

MazeGen

Joined: 06 Oct 2003
Posts: 977
Location: Czechoslovakia

MazeGen 21 Oct 2003, 11:30

scientica wrote:

The mircocode are (IIRC) ÂµOps, which enables programmers to to some extent, make their own instructions (P4 be a CISC proceccor with RISC instructions). In short you can make make an CISC instruciton via the ÂµOp RISC instrucitons. I'm don't that mucha bout it, but my guess is that some linux guru migth know it (my red hat (tries to) updates the microcode).

Well, it sounds very interesting, but I never heard about it... Their own instructions... are you sure?

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21 Oct 2003, 11:30

scientica
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scientica 21 Oct 2003, 12:21

MazeGen wrote:

Well, it sounds very interesting, but I never heard about it... Their own instructions... are you sure?

Sure enougth to bet my brain? No.
(Can't find any damn info on intels site, their search engige returns pages that doesn't contain the term I'm searching for...., and google doesn't give much more...)

The most I got was: "well undocumented, obscure" and somethinga bout "CPU bug fixes".

21 Oct 2003, 12:21

MazeGen

Joined: 06 Oct 2003
Posts: 977
Location: Czechoslovakia

MazeGen 23 Oct 2003, 20:06

fasm9 wrote:

whatever! everything about it,
but img, some of it maybe secret. opening one-secret, amplify to break whole secret (bleh)

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btw, why we can't modify or see the intel p4 microcode(which is not encrypted.)?

You are still too mysterious, fasm9.

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23 Oct 2003, 20:06

fasm9

Joined: 19 Jun 2003
Posts: 439

fasm9 25 Oct 2003, 08:22

MazeGen wrote:

You are still too mysterious, fasm9.

sorry my poor english,

my english is the result of following the bureaucratism.[*shudder*]
if they let me go on my way in past, or if i followed HANDS-ON activity more earlier, maybe i am the english master now. Smile

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some wicked system exploits the stupid people.

25 Oct 2003, 08:22

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 02 Nov 2003, 13:56

Well, like others, I'm not sure what you want, so I'm gonna give you "everything" Smile

http://www.bmath.net/bmath/
http://www.azillionmonkeys.com/qed/asm.html

Two sites, that have achieved doing floating point arithmetrics faster, than FPU-s & integer multiplys faster than ALU-s can.

P.S. About those μ-ops or μ-codes: You can change them????????? Neutral

I think, that without cracking open the core of your P4, you can't even imagine of such thing. You just CAN NOT change the order of wires in your processor...or can you? Confused

P.P.S. I think I know, what you mean afterall. I (& others) call it register renaming.
For example newer Pentiums would change
mov eax,0
mov i,eax
moveax,50
mov j,eax
to
mov eax[0],0
mov i,eax[0]
mov eax[1],50
mov j,eax[1]
to prevent stalls so I think, that 0 and 1 go to U & V-pipe respectively
Quoting an eBook:

Quote:

Now the instruction set does not give the programmer the ability to select one of
these specific register array elements for a given instruction, but the CPU can automatically choose a different register array
element if doing so would not change the overall computation and doing so could speed up the execution of the program.

So, too bad! Sad

The general register array can only be accessed by CPU itself & no programmer can disturb, but only hope:D

02 Nov 2003, 13:56

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