Index
> Main > 32 bit extended register addressing in 64 bit code |
| Author |
|
|
Tomasz Grysztar 25 Apr 2006, 16:01
I did overlook this problem. Can anyone with AMD64 (or EM64T) processor check out whether such encoded instruction works as expected?
|
|||
25 Apr 2006, 16:01 |
|
|
LocoDelAssembly 25 Apr 2006, 22:35
Well not sure if this what you want
Code: format ELF64 executable segment readable executable entry $ lea r11, [msg] mov rax, 0FFFFFFFF00000000h xor r11, rax db 67h, 49h, 83h, 03h, 04h mov edx,msg_size ; CPU zero extends 32-bit operation to 64-bit ; we can use less bytes than in case mov rdx,... lea rsi,[msg] mov edi,1 ; STDOUT mov eax,1 ; sys_write syscall xor edi,edi ; exit code 0 mov eax,60 ; sys_exit syscall segment readable writeable msg db '0',0xA msg_size = $-msg Quote: ubuntu@ubuntu:~/Desktop/fasm$ ./fasm hello64.asm If you need to test something else ask Regards |
|||
|
25 Apr 2006, 22:35 |
|
|
revolution 26 Apr 2006, 00:29
Thanks locodelassembly.
That clearly shows add [r11d],4 as a valid instruction. I think it is safe to assume that all r8d-r15d are valid 32 bit address registers. |
|||
|
26 Apr 2006, 00:29 |
|
|
LocoDelAssembly 26 Apr 2006, 01:03
Yes, it's safe
 (if the code below is right)
Code: format ELF64 executable segment readable executable entry $ mov rax, 0FFFFFFFF00000000h rept 8 n:8 { lea r#n, [msg] xor r#n, rax db 67h add qword [r#n], 1 } mov edx,msg_size ; CPU zero extends 32-bit operation to 64-bit ; we can use less bytes than in case mov rdx,... lea rsi,[msg] mov edi,1 ; STDOUT mov eax,1 ; sys_write syscall xor edi,edi ; exit code 0 mov eax,60 ; sys_exit syscall segment readable writeable msg db '0',0xA msg_size = $-msg Quote: ubuntu@ubuntu:~/Desktop/fasm$ ./fasm hello64.asm |
|||
|
26 Apr 2006, 01:03 |
|
|
Tomasz Grysztar 26 Apr 2006, 07:56
Thus comes the 1.65.21 release.
 |
|||
|
26 Apr 2006, 07:56 |
|
< Last Thread | Next Thread > |
Forum Rules:
|