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Index > Compiler Internals > Absolute memory offset in 64 bit code (bug maybe?)

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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17716
Location: In your JS exploiting you and your system
revolution
I am having some trouble with absolute memory offset in 64 bit code
Code:
        use64

        org     0

        mov     [0],eax         ;<-- Generates: mov [RIP-6],eax
        mov     [1 shl 32],eax  ;<-- Error: value out of range.

        org     1 shl 32
        mov     [0],eax         ;<-- Error: value out of range.
        mov     [1 shl 32],eax  ;<-- Error: value out of range.    
I think the encodings below are valid ways to do the above
Code:

        db      0a3h,8 dup 0            ;mov [0],eax
        db      089h,4,25h,0,0,0        ;mov [0],eax
        db      0a3h,4 dup 0,1,0,0,0    ;mov [2^32],eax    
Post 24 Apr 2006, 12:15
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
revolution: shouldn't you use 1 shl 64 instead of 32? If i understand right what you wanted
Post 24 Apr 2006, 12:42
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17716
Location: In your JS exploiting you and your system
revolution
Quote:
shouldn't you use 1 shl 64 instead of 32?
1 shl 64 is too big! 1 shl 32 is 4294967296 which is what I intended.
Post 24 Apr 2006, 13:12
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17716
Location: In your JS exploiting you and your system
revolution
I just saw another thread concerning the same thing.

http://board.flatassembler.net/topic.php?t=5154

I will reply there.
Post 24 Apr 2006, 13:16
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
sorry then
Post 24 Apr 2006, 13:27
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Tomasz Grysztar



Joined: 16 Jun 2003
Posts: 7802
Location: Kraków, Poland
Tomasz Grysztar
fasm's manual, section 2.1.19 wrote:
The long mode uses also the instruction pointer based addresses, you can specify it manually with the special RIP register symbol, but such addressing is also automatically generated by flat assembler, since there is no 64-bit absolute addressing in long mode. You can still force the assembler to use the 32-bit absolute addressing by putting the dword size override for address inside the square brackets. There is also one exception, where the 64-bit absolute addressing is possible, it's the mov instruction with one of the operand being accumulator register, and second being the memory operand. To force the assembler to use the 64-bit absolute addressing there, use the qword size operator for address inside the square brackets. When no size operator is applied to address, assembler generates the optimal form automatically.

So the correct way is:
Code:
        use64

        org     0

        mov     [0],eax         ; Generates: mov [RIP-6],eax
        mov     [dword 0],eax   ; Generates: mov [0],eax
        mov     [dword 1 shl 32],eax

        org     1 shl 32
        mov     [dword 0],eax
        mov     [dword 1 shl 32],eax    
Post 24 Apr 2006, 14:21
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17716
Location: In your JS exploiting you and your system
revolution
Code:
mov [dword 1 shl 32],eax    
I think this is a bug, 1 shl 32 cannot fit into a dword.
Post 24 Apr 2006, 15:10
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Tomasz Grysztar



Joined: 16 Jun 2003
Posts: 7802
Location: Kraków, Poland
Tomasz Grysztar
Laughing what a mess! Right, I thought it was 31 here (and that you wanted absolute dword addressing, not absolute qword). There's some slip in error checking, I'll find it out.
Post 24 Apr 2006, 15:58
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Tomasz Grysztar



Joined: 16 Jun 2003
Posts: 7802
Location: Kraków, Poland
Tomasz Grysztar
It's fixed in 1.65.20.
Post 25 Apr 2006, 20:13
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17716
Location: In your JS exploiting you and your system
revolution
Yep, it it working great.
Post 26 Apr 2006, 00:31
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