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Index > Main > dword mov with x86-64?

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fonolite



Joined: 14 Dec 2005
Posts: 32
fonolite
mov rax, 123456789ABCDEF0h

mov rdx, 0FFFFFFFFh



mov al, dl => rax=123456789ABCDEFFh

mov ax, dx => rax=123456789ABCFFFFh

but,

mov eax, edx => rax=00000000FFFFFFFFh


How strange for DWORD transfer.

Upper 32bit of general 64bit register goes away when DWORD transfer.

Is it a sort of bug for x86-64 CPU?

I tested Intel's EM64T in long mode with fasm 1.65.5 and 1.64.

I have no AMD64.
Post 19 Jan 2006, 12:06
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 7721
Location: Kraków, Poland
Tomasz Grysztar
It's not a bug, it's a feature. Wink
It was documented from the very first version of published x86-64 specification. The operations on 32-bit register zero the high 32 bits of target register. This is mainly to let you use the shorter form (without REX prefix) of instruction for some cases like "sub eax,eax" to zero RAX register (instead of "sub rax,rax", which has one byte longer opcode), or "mov eax,1" instead of "mov rax,1".
Post 19 Jan 2006, 12:11
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fonolite



Joined: 14 Dec 2005
Posts: 32
fonolite
Oh, thanks for your quick detailed answer.

x86-64 looks strange to me...


Anyway, how can I expand 32bit to 64bit register?

i.e. (upper 0, lower eax) => (eax, eax)=rax

Simple question or not?
Post 19 Jan 2006, 12:35
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 7721
Location: Kraków, Poland
Tomasz Grysztar
Can you rephrase?
Post 19 Jan 2006, 12:46
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Madis731



Joined: 25 Sep 2003
Posts: 2141
Location: Estonia
Madis731
I think he meant:
Code:
mov eax,4C63EF53h
mov rdx,rax
shl rdx,32
add rdx,rax
    


-Or-

Code:
mov eax,19283746h
imul 100000001h ; *(2^32+1)
    


so that rax=eax shl 32 + eax
Post 19 Jan 2006, 12:55
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fonolite



Joined: 14 Dec 2005
Posts: 32
fonolite
Madis731 is right. Smile

I got used my code like below.


Code:
mov rdx,rax 
shl rdx,32 
or rdx,rax    


similar answer to Madis731.


This DWORD restriction bothers me. Sad


Anyway, Thank you all...,
Post 19 Jan 2006, 13:23
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