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vid
Verbosity in development


Joined: 05 Sep 2003
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vid
Post 03 Nov 2005, 12:13
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MazeGen



Joined: 06 Oct 2003
Posts: 975
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MazeGen
Such references are often imprecise. For instance, see the description of BT instruction. It says only carry flag is affected, but, in fact, all status flags are affected.
Post 03 Nov 2005, 13:28
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
know any better? Wink i liked 386 <-> 086 comparation from it, i 've learned quite a lot new things.

flags are problem in anything i've ever seen, i always rather check myself if instruction changes flags. if you know any good *reference* then let me know...
Post 03 Nov 2005, 20:29
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MazeGen



Joined: 06 Oct 2003
Posts: 975
Location: Czechoslovakia
MazeGen
That's the problem, BT on most processors changes only CF, so you can't check it yourself in some cases Wink

I always use electronic Intel Software Developer’s Manuals with AMD manuals. The latest revisions contain descriptions for both 32 and 64 mode.

BTW, there are some new instructions in 486 and Pentium and a lot of more machine status registers.

http://developer.intel.com/design/Pentium4/documentation.htm#manuals
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_7044,00.html
Post 04 Nov 2005, 09:21
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
then how is ti with BT? does or doesn't it change other flags on 386?

and how do i know which feature is since which processor etc. from these manuals?
Post 04 Nov 2005, 09:54
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MazeGen



Joined: 06 Oct 2003
Posts: 975
Location: Czechoslovakia
MazeGen
vid wrote:
then how is ti with BT? does or doesn't it change other flags on 386?

Hmm, my Intel 386 and Pentium I manual says it changes only CF, but Pentium Pro (successor of Pentium I) says all status flags are affected...
Anyway, from my point of view, you never know what procesor drives your code, so you have to count with the worst possibility.
vid wrote:
and how do i know which feature is since which processor etc. from these manuals?

Open Volume 1: Basic Architecture and go to CHAPTER 5 INSTRUCTION SET SUMMARY. There you find when MMX, SSE, SSE2 and SSE3 extension were introduced (in fact, you'll be redirected to chapter 2.2.3 SIMD Instructions).

As for older 386+ new instructions like LSS, XADD, BSWAP, CMPXCHG etc., you find the information in Volume 3: System Programming Guide, 18.12. NEW INSTRUCTIONS IN THE PENTIUM AND LATER IA-32 PROCESSORS. There are news in 386, 486, Pentium and Pentium Pro.
Note that Pentium+ instructions aren't tied to some processor generation, but rather to some CPUID flag. This flag is then introduced in some specific processor.
Also note that no single instruction was introduced after Pentium Pro. After Pentium Pro, there were introduced only whole extensions.

I hope I have covered whole instruction set in this answer.

At the beginning, it could be difficult to find some specific information in these huge manuals, but after some time you'll became more familiar with them and you'll use just them Wink

EDIT:
For instructions introduced with 486, there is a note about compatibility directly in instruction description. See, for instance, CMPXCHG:

Quote:
IA-32 Architecture Legacy Compatibility
This instruction is not supported on Intel processors earlier than the Intel486 processors.
Post 04 Nov 2005, 14:34
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
thanks
Post 07 Nov 2005, 14:16
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