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> Non-x86 architectures > FASMARM v1.44 - Cross assembler for ARM CPUsGoto page Previous 1, 2, 3 ... 25, 26, 27 ... 31, 32, 33 Next |
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revolution 01 Oct 2015, 08:43
Andrew Martin wrote: Please look to the symbols names in the symbols table. There must be the names of labels, names of sections, etc. but not ASCII garbage. |
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01 Oct 2015, 08:43 |
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Andrew Martin 01 Oct 2015, 08:59
Source code for test posted above.
No, does not display. I at first tried on Keil uVision, but when this debugger did not read ELF DWARF, I wanted to look in what problem. Then I get binutils for ARM, but neither obgdump nor readelf did not rotin me the normal symbols table. With the numbers of lines similarly. When took the file of ELF DWARF (.axf), created on Keil uVision (armasm), and looked him through obgdump and readelf, table of characters and number of lines represented without errors. |
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01 Oct 2015, 08:59 |
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revolution 01 Oct 2015, 09:11
Can you please tell me if the example file 'ARMDWARF.AXF' in the fasmarm download reads correctly with obgdump/readelf/debugger?
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01 Oct 2015, 09:11 |
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Andrew Martin 01 Oct 2015, 09:31
Full log:
Code: D:\ARM\DSI\Source>objdump.exe -m arm -EL -l -t --dwarf=decodedline --disassemble-zeroes -D ARMDWARF.AXF objdump.exe: ARMDWARF.AXF: Bad value D:\ARM\DSI\Source>readelf.exe ARMDWARF.axf -a ELF Header: Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2's complement, little endian Version: 1 (current) OS/ABI: UNIX - System V ABI Version: 0 Type: EXEC (Executable file) Machine: ARM Version: 0x1 Entry point address: 0x0 Start of program headers: 52 (bytes into file) Start of section headers: 524 (bytes into file) Flags: 0x2000016, has entry point, Version2 EABI, sorted symbol tables, mapping symbols precede others Size of this header: 52 (bytes) Size of program headers: 32 (bytes) Number of program headers: 1 Size of section headers: 40 (bytes) Number of section headers: 8 Section header string table index: 2 Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] one PROGBITS 00000000 000054 000040 00 WAX 0 0 32 [ 2] .shstrtab STRTAB 00000000 000094 000048 00 0 0 0 [ 3] .debug_abbrev PROGBITS 00000000 0000dc 000010 00 0 0 0 [ 4] .debug_info PROGBITS 00000000 0000ec 00006c 00 0 0 0 [ 5] .debug_line PROGBITS 00000000 000158 000040 00 0 0 0 [ 6] .symtab SYMTAB 00000000 000198 000050 10 6 12 4 [ 7] .strtab STRTAB 00000000 0001e8 000024 00 0 0 0 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings) I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific) There are no section groups in this file. Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x000054 0x00000000 0x00000000 0x00040 0x00040 RWE 0x20 Section to Segment mapping: Segment Sections... 00 one There is no dynamic section in this file. There are no relocations in this file. There are no unwind sections in this file. Symbol table '.symtab' contains 5 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 FUNC LOCAL DEFAULT 1 2: 0000001c 0 OBJECT LOCAL DEFAULT 1 3: 00000000 0 FUNC LOCAL DEFAULT 1 4: 0000001c 1 OBJECT LOCAL DEFAULT 1 No version information found in this file. I work with Cortex-M0 (STM32F030F4P6), so Keil uVision configured according to the MCU. edit by revolution: Added code tags for better readability |
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01 Oct 2015, 09:31 |
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revolution 01 Oct 2015, 09:36
When I use the ARM ADS debugger the 'ARMDWARF.AXF' file looks fine with all labels and line numbers correct. Do you see the same with Keil?
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01 Oct 2015, 09:36 |
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Andrew Martin 01 Oct 2015, 10:53
I created very simple project for testing and comparison. Package contents:
- source file for FASMARM test.asm - the same source file for ARMASM (Keil uVision) test.s - ELF DWARF generated by ARMASM/ARMLINK - ELF DWARF generated by FASMARM - objdump/readelf logs for both
Last edited by Andrew Martin on 01 Oct 2015, 11:02; edited 1 time in total |
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01 Oct 2015, 10:53 |
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Andrew Martin 01 Oct 2015, 11:00
Binutils as the third party of dispute show the correct symbols table for ELF created with Armasm/Armlink, and wrong for ELF created FASMARM. In addition, objdump in general fails to process ELF, created FASMARM.
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01 Oct 2015, 11:00 |
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revolution 01 Oct 2015, 12:20
Can you please try this file compiled from your original source. It changes one byte.
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01 Oct 2015, 12:20 |
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Andrew Martin 01 Oct 2015, 12:34
Symbols table now displays correctly!
Log: Code: D:\ARM\DSI\Source>objdump.exe -m arm -EL -l -t --dwarf=decodedline --disassembler-options=force-thumb --disassemble-zeroes -D dso_micro.axf dso_micro.axf: file format elf32-littlearm SYMBOL TABLE: 08000288 l O .text 00000004 lcd_spi_cblock.dma_src 080002dc l O .text 00000004 lcd_cblock.buf_size 08000270 l O .text 00000004 lcd_spi_cblock.spi_base 08000118 l O .text 00000004 _reset_handler.start_code 0800027c l O .text 00000004 lcd_spi_cblock.dma_base 080001ac l O .text 00000004 rcc_config.apb2_clk_en 08000258 l F .text 00000000 lcd_spi_cblock 0800025c l O .text 00000004 lcd_spi_cblock.gpioa_base 0800010c l O .text 00000004 _blink.delay 08000000 l F .text 00000000 _vectors 080002d8 l O .text 00000004 lcd_cblock.lpbuf 0800020e l F .text 00000000 spi_tx 08000108 l O .text 00000004 _blink.rcc_base 08000280 l O .text 00000004 lcd_spi_cblock.dma1_ch3 08000112 l F .text 00000000 _reset_handler 080001a4 l O .text 00000004 rcc_config.rcc_base 080000e8 l F .text 00000000 _blink.blink_loop 080002d4 l F .text 00000000 lcd_cblock 080001a8 l O .text 00000004 rcc_config.ahb_clk_en 080002d4 l O .text 00000004 lcd_cblock.gpioa_base 080002e0 l F .text 00000000 main 08000110 l F .text 00000000 _default_handler 080000c0 l F .text 00000000 _blink 08000258 l O .text 00000004 lcd_spi_cblock.rcc_base 080001b0 l O .text 00000004 rcc_config.apb1_clk_en 08000290 l O .text 00000004 lcd_spi_cblock.dma_ccr 08000104 l O .text 00000004 _blink.gpioa_base 08000268 l O .text 00000004 lcd_spi_cblock.gmask_3 0800026c l O .text 00000004 lcd_spi_cblock.gmask_4 08000260 l O .text 00000004 lcd_spi_cblock.gmask_1 08000264 l O .text 00000004 lcd_spi_cblock.gmask_2 0800011c l F .text 00000000 rcc_config 08000278 l O .text 00000004 lcd_spi_cblock.cr2_mask 0800028c l O .text 00000004 lcd_spi_cblock.dma_cnt 0800021e l F .text 00000000 spi_tx_start 080001b4 l F .text 00000000 lcd_spi_init 08000284 l O .text 00000004 lcd_spi_cblock.dma_dest 08000294 l F .text 00000000 lcd_init 08000274 l O .text 00000004 lcd_spi_cblock.cr1_mask Decoded dump of debug contents of section .debug_line: CU: dso_micro.asm: File name Line number Starting address ./startup.asm:[++] startup.asm 8 0x8000000 startup.asm 69 0x80000c0 startup.asm 73 0x80000c2 startup.asm 75 0x80000c8 startup.asm 76 0x80000ca startup.asm 77 0x80000cc startup.asm 82 0x80000ce startup.asm 83 0x80000d0 startup.asm 84 0x80000d2 startup.asm 85 0x80000d4 startup.asm 86 0x80000d6 startup.asm 87 0x80000d8 startup.asm 88 0x80000da startup.asm 89 0x80000dc startup.asm 91 0x80000de startup.asm 92 0x80000e0 startup.asm 93 0x80000e2 startup.asm 94 0x80000e4 startup.asm 95 0x80000e6 startup.asm 95 0x80000ed startup.asm 96 0x80000ef startup.asm 97 0x80000f1 startup.asm 98 0x80000f3 startup.asm 100 0x80000f5 startup.asm 101 0x80000f7 startup.asm 102 0x80000f9 startup.asm 103 0x80000fb startup.asm 104 0x80000fd startup.asm 105 0x80000ff startup.asm 107 0x8000101 startup.asm 108 0x8000103 startup.asm 109 0x8000105 startup.asm 111 0x8000107 startup.asm 112 0x8000109 startup.asm 113 0x800010d startup.asm 113 0x800010d UNKNOWN (23): length 26 startup.asm 114 0x800010f startup.asm 117 0x8000115 startup.asm 118 0x8000117 startup.asm 119 0x8000119 startup.asm 121 0x800011b startup.asm 123 0x8000121 startup.asm 125 0x8000127 startup.asm 129 0x8000131 startup.asm 130 0x8000133 startup.asm 131 0x8000135 startup.asm 132 0x8000137 startup.asm 135 0x8000139 startup.asm 136 0x800013b startup.asm 137 0x800013d startup.asm 138 0x800013f startup.asm 141 0x8000141 startup.asm 142 0x8000143 startup.asm 143 0x8000145 startup.asm 144 0x8000147 startup.asm 146 0x8000149 startup.asm 147 0x800014b startup.asm 148 0x800014d startup.asm 149 0x800014f startup.asm 151 0x8000151 startup.asm 154 0x8000153 startup.asm 155 0x8000157 startup.asm 156 0x800015b startup.asm 157 0x800015f ./lcd_3410.asm:[++] lcd_3410.asm 147 0x8000163 lcd_3410.asm 149 0x8000165 lcd_3410.asm 153 0x8000167 lcd_3410.asm 155 0x800016d lcd_3410.asm 157 0x8000173 lcd_3410.asm 158 0x8000175 lcd_3410.asm 159 0x8000177 lcd_3410.asm 161 0x800017d lcd_3410.asm 162 0x800017f lcd_3410.asm 164 0x8000181 lcd_3410.asm 169 0x8000183 lcd_3410.asm 170 0x8000185 lcd_3410.asm 171 0x8000187 lcd_3410.asm 172 0x8000189 lcd_3410.asm 174 0x800018b lcd_3410.asm 175 0x800018d lcd_3410.asm 176 0x800018f lcd_3410.asm 177 0x8000191 lcd_3410.asm 178 0x8000193 lcd_3410.asm 179 0x8000195 lcd_3410.asm 181 0x8000197 lcd_3410.asm 182 0x8000199 lcd_3410.asm 183 0x800019b lcd_3410.asm 184 0x800019d lcd_3410.asm 187 0x800019f lcd_3410.asm 192 0x80001a1 lcd_3410.asm 193 0x80001a3 lcd_3410.asm 195 0x80001a5 lcd_3410.asm 196 0x80001a7 lcd_3410.asm 199 0x80001a9 lcd_3410.asm 204 0x80001ab lcd_3410.asm 205 0x80001ad lcd_3410.asm 206 0x80001af lcd_3410.asm 207 0x80001b1 lcd_3410.asm 209 0x80001b3 lcd_3410.asm 210 0x80001b5 lcd_3410.asm 211 0x80001b7 lcd_3410.asm 212 0x80001b9 lcd_3410.asm 214 0x80001bb lcd_3410.asm 219 0x80001bd lcd_3410.asm 220 0x80001bf lcd_3410.asm 224 0x80001c1 lcd_3410.asm 226 0x80001c3 lcd_3410.asm 227 0x80001c5 lcd_3410.asm 228 0x80001c7 lcd_3410.asm 229 0x80001c9 lcd_3410.asm 230 0x80001cb lcd_3410.asm 233 0x80001cd lcd_3410.asm 235 0x80001cf lcd_3410.asm 239 0x80001d1 lcd_3410.asm 240 0x80001d3 lcd_3410.asm 246 0x80001d7 lcd_3410.asm 247 0x80001d9 lcd_3410.asm 248 0x80001db lcd_3410.asm 250 0x80001dd lcd_3410.asm 251 0x80001df lcd_3410.asm 255 0x80001e5 lcd_3410.asm 256 0x80001e7 lcd_3410.asm 257 0x80001e9 lcd_3410.asm 259 0x80001eb lcd_3410.asm 264 0x80001ed lcd_3410.asm 265 0x80001ef lcd_3410.asm 266 0x80001f1 lcd_3410.asm 267 0x80001f3 lcd_3410.asm 269 0x80001f5 lcd_3410.asm 270 0x80001f7 lcd_3410.asm 272 0x80001f9 lcd_3410.asm 273 0x80001fb lcd_3410.asm 275 0x80001fd lcd_3410.asm 276 0x80001ff lcd_3410.asm 277 0x8000201 lcd_3410.asm 278 0x8000203 lcd_3410.asm 280 0x8000205 lcd_3410.asm 284 0x8000207 lcd_3410.asm 285 0x800020b lcd_3410.asm 287 0x800020f lcd_3410.asm 288 0x8000213 lcd_3410.asm 289 0x8000217 lcd_3410.asm 290 0x800021b lcd_3410.asm 292 0x800021f lcd_3410.asm 293 0x8000223 lcd_3410.asm 294 0x8000227 lcd_3410.asm 296 0x800022b lcd_3410.asm 297 0x800022f lcd_3410.asm 298 0x8000233 lcd_3410.asm 299 0x8000237 lcd_3410.asm 300 0x800023b lcd_3410.asm 301 0x800023f lcd_3410.asm 386 0x8000243 lcd_3410.asm 387 0x8000245 lcd_3410.asm 389 0x8000249 lcd_3410.asm 394 0x800024b lcd_3410.asm 395 0x800024d lcd_3410.asm 396 0x800024f lcd_3410.asm 397 0x8000251 lcd_3410.asm 398 0x8000253 lcd_3410.asm 399 0x8000257 lcd_3410.asm 400 0x8000259 lcd_3410.asm 401 0x800025d lcd_3410.asm 402 0x800025f lcd_3410.asm 403 0x8000263 lcd_3410.asm 404 0x8000265 lcd_3410.asm 405 0x8000269 lcd_3410.asm 406 0x800026b lcd_3410.asm 407 0x800026f lcd_3410.asm 408 0x8000271 lcd_3410.asm 409 0x8000273 lcd_3410.asm 411 0x8000275 lcd_3410.asm 412 0x8000277 lcd_3410.asm 414 0x8000279 lcd_3410.asm 415 0x800027d lcd_3410.asm 416 0x800027f lcd_3410.asm 417 0x8000281 lcd_3410.asm 806 0x8000283 lcd_3410.asm 808 0x8000287 lcd_3410.asm 809 0x800028b ./dso_micro.asm:[++] dso_micro.asm 96 0x800028f dso_micro.asm 97 0x8000293 dso_micro.asm 101 0x8000297 dso_micro.asm 102 0x8000299 Disassembly of section .text: 08000000 <_vectors>: objdump.exe: Warning: Only DWARF version 2, 3 and 4 line info is currently supported. BFD: Dwarf Error: mangled line number section. _vectors(): 8000000: 1000 asrs r0, r0, #32 8000002: 2000 movs r0, #0 8000004: 0113 lsls r3, r2, #4 8000006: 0800 lsrs r0, r0, #32 8000008: 00c1 lsls r1, r0, #3 800000a: 0800 lsrs r0, r0, #32 800000c: 00c1 lsls r1, r0, #3 800000e: 0800 lsrs r0, r0, #32 8000010: 0111 lsls r1, r2, #4 8000012: 0800 lsrs r0, r0, #32 8000014: 0111 lsls r1, r2, #4 8000016: 0800 lsrs r0, r0, #32 8000018: 0111 lsls r1, r2, #4 800001a: 0800 lsrs r0, r0, #32 800001c: 0111 lsls r1, r2, #4 800001e: 0800 lsrs r0, r0, #32 8000020: 0111 lsls r1, r2, #4 8000022: 0800 lsrs r0, r0, #32 8000024: 0111 lsls r1, r2, #4 8000026: 0800 lsrs r0, r0, #32 8000028: 0111 lsls r1, r2, #4 800002a: 0800 lsrs r0, r0, #32 800002c: 0111 lsls r1, r2, #4 800002e: 0800 lsrs r0, r0, #32 8000030: 0111 lsls r1, r2, #4 8000032: 0800 lsrs r0, r0, #32 8000034: 0111 lsls r1, r2, #4 8000036: 0800 lsrs r0, r0, #32 8000038: 0111 lsls r1, r2, #4 800003a: 0800 lsrs r0, r0, #32 800003c: 0111 lsls r1, r2, #4 800003e: 0800 lsrs r0, r0, #32 8000040: 0111 lsls r1, r2, #4 8000042: 0800 lsrs r0, r0, #32 8000044: 0111 lsls r1, r2, #4 8000046: 0800 lsrs r0, r0, #32 8000048: 0111 lsls r1, r2, #4 800004a: 0800 lsrs r0, r0, #32 800004c: 0111 lsls r1, r2, #4 800004e: 0800 lsrs r0, r0, #32 8000050: 0111 lsls r1, r2, #4 8000052: 0800 lsrs r0, r0, #32 8000054: 0111 lsls r1, r2, #4 8000056: 0800 lsrs r0, r0, #32 8000058: 0111 lsls r1, r2, #4 800005a: 0800 lsrs r0, r0, #32 800005c: 0111 lsls r1, r2, #4 800005e: 0800 lsrs r0, r0, #32 8000060: 0111 lsls r1, r2, #4 8000062: 0800 lsrs r0, r0, #32 8000064: 0111 lsls r1, r2, #4 8000066: 0800 lsrs r0, r0, #32 8000068: 0111 lsls r1, r2, #4 800006a: 0800 lsrs r0, r0, #32 800006c: 0111 lsls r1, r2, #4 800006e: 0800 lsrs r0, r0, #32 8000070: 0111 lsls r1, r2, #4 8000072: 0800 lsrs r0, r0, #32 8000074: 0111 lsls r1, r2, #4 8000076: 0800 lsrs r0, r0, #32 8000078: 0111 lsls r1, r2, #4 800007a: 0800 lsrs r0, r0, #32 800007c: 0111 lsls r1, r2, #4 800007e: 0800 lsrs r0, r0, #32 8000080: 0111 lsls r1, r2, #4 8000082: 0800 lsrs r0, r0, #32 8000084: 0111 lsls r1, r2, #4 8000086: 0800 lsrs r0, r0, #32 8000088: 0111 lsls r1, r2, #4 800008a: 0800 lsrs r0, r0, #32 800008c: 0111 lsls r1, r2, #4 800008e: 0800 lsrs r0, r0, #32 8000090: 0111 lsls r1, r2, #4 8000092: 0800 lsrs r0, r0, #32 8000094: 0111 lsls r1, r2, #4 8000096: 0800 lsrs r0, r0, #32 8000098: 0111 lsls r1, r2, #4 800009a: 0800 lsrs r0, r0, #32 800009c: 0111 lsls r1, r2, #4 800009e: 0800 lsrs r0, r0, #32 80000a0: 0111 lsls r1, r2, #4 80000a2: 0800 lsrs r0, r0, #32 80000a4: 0111 lsls r1, r2, #4 80000a6: 0800 lsrs r0, r0, #32 80000a8: 0111 lsls r1, r2, #4 80000aa: 0800 lsrs r0, r0, #32 80000ac: 0111 lsls r1, r2, #4 80000ae: 0800 lsrs r0, r0, #32 80000b0: 0111 lsls r1, r2, #4 80000b2: 0800 lsrs r0, r0, #32 80000b4: 0111 lsls r1, r2, #4 80000b6: 0800 lsrs r0, r0, #32 80000b8: 0111 lsls r1, r2, #4 80000ba: 0800 lsrs r0, r0, #32 80000bc: 0111 lsls r1, r2, #4 80000be: 0800 lsrs r0, r0, #32 080000c0 <_blink>: $t(): 80000c0: 4811 ldr r0, [pc, #68] ; (8000108 <_blink.rcc_base>) 80000c2: 6942 ldr r2, [r0, #20] 80000c4: 2101 movs r1, #1 80000c6: 0449 lsls r1, r1, #17 80000c8: 430a orrs r2, r1 80000ca: 6142 str r2, [r0, #20] 80000cc: 480d ldr r0, [pc, #52] ; (8000104 <_blink.gpioa_base>) 80000ce: 6802 ldr r2, [r0, #0] 80000d0: 2103 movs r1, #3 80000d2: 0189 lsls r1, r1, #6 80000d4: 438a bics r2, r1 80000d6: 2101 movs r1, #1 80000d8: 0189 lsls r1, r1, #6 80000da: 430a orrs r2, r1 80000dc: 6002 str r2, [r0, #0] 80000de: 6882 ldr r2, [r0, #8] 80000e0: 2103 movs r1, #3 80000e2: 0189 lsls r1, r1, #6 80000e4: 430a orrs r2, r1 80000e6: 6082 str r2, [r0, #8] 080000e8 <_blink.blink_loop>: _blink.blink_loop(): 80000e8: 2101 movs r1, #1 80000ea: 00c9 lsls r1, r1, #3 80000ec: 6181 str r1, [r0, #24] 80000ee: 4907 ldr r1, [pc, #28] ; (800010c <_blink.delay>) 80000f0: 3901 subs r1, #1 80000f2: d1fd bne.n 80000f0 <_blink.blink_loop+0x8> 80000f4: 2101 movs r1, #1 80000f6: 04c9 lsls r1, r1, #19 80000f8: 6181 str r1, [r0, #24] 80000fa: 4904 ldr r1, [pc, #16] ; (800010c <_blink.delay>) 80000fc: 3901 subs r1, #1 80000fe: d1fd bne.n 80000fc <_blink.blink_loop+0x14> 8000100: e7f2 b.n 80000e8 <_blink.blink_loop> 8000102: ffff 0000 vaddl.u<illegal width 64> q8, d15, d0 08000104 <_blink.gpioa_base>: 8000104: 0000 movs r0, r0 8000106: 4800 ldr r0, [pc, #0] ; (8000108 <_blink.rcc_base>) 08000108 <_blink.rcc_base>: 8000108: 1000 asrs r0, r0, #32 800010a: 4002 ands r2, r0 0800010c <_blink.delay>: 800010c: cfc0 ldmia r7, {r6, r7} 800010e: 006a lsls r2, r5, #1 08000110 <_default_handler>: $t(): 8000110: 4770 bx lr 08000112 <_reset_handler>: _reset_handler(): 8000112: b672 cpsid i 8000114: 4800 ldr r0, [pc, #0] ; (8000118 <_reset_handler.start_code>) 8000116: 4700 bx r0 08000118 <_reset_handler.start_code>: 8000118: 02e1 lsls r1, r4, #11 800011a: 0800 lsrs r0, r0, #32 0800011c <rcc_config>: $t(): 800011c: 4b21 ldr r3, [pc, #132] ; (80001a4 <rcc_config.rcc_base>) 800011e: 6818 ldr r0, [r3, #0] 8000120: 2101 movs r1, #1 8000122: 0409 lsls r1, r1, #16 8000124: 4308 orrs r0, r1 8000126: 6018 str r0, [r3, #0] 8000128: 2101 movs r1, #1 800012a: 0449 lsls r1, r1, #17 800012c: 6818 ldr r0, [r3, #0] 800012e: 4208 tst r0, r1 8000130: d0fc beq.n 800012c <rcc_config+0x10> 8000132: 6858 ldr r0, [r3, #4] 8000134: 210f movs r1, #15 8000136: 1c09 adds r1, r1, #0 8000138: 4388 bics r0, r1 800013a: 6058 str r0, [r3, #4] 800013c: 6858 ldr r0, [r3, #4] 800013e: 210f movs r1, #15 8000140: 0489 lsls r1, r1, #18 8000142: 4388 bics r0, r1 8000144: 2101 movs r1, #1 8000146: 0409 lsls r1, r1, #16 8000148: 4308 orrs r0, r1 800014a: 210f movs r1, #15 800014c: 0109 lsls r1, r1, #4 800014e: 4388 bics r0, r1 8000150: 2107 movs r1, #7 8000152: 0209 lsls r1, r1, #8 8000154: 4388 bics r0, r1 8000156: 6058 str r0, [r3, #4] 8000158: 6818 ldr r0, [r3, #0] 800015a: 2101 movs r1, #1 800015c: 0609 lsls r1, r1, #24 800015e: 4308 orrs r0, r1 8000160: 6018 str r0, [r3, #0] 8000162: 2101 movs r1, #1 8000164: 0649 lsls r1, r1, #25 8000166: 6818 ldr r0, [r3, #0] 8000168: 4208 tst r0, r1 800016a: d0fc beq.n 8000166 <rcc_config+0x4a> 800016c: 6858 ldr r0, [r3, #4] 800016e: 2103 movs r1, #3 8000170: 1c09 adds r1, r1, #0 8000172: 4388 bics r0, r1 8000174: 2101 movs r1, #1 8000176: 0049 lsls r1, r1, #1 8000178: 6058 str r0, [r3, #4] 800017a: 2103 movs r1, #3 800017c: 0089 lsls r1, r1, #2 800017e: 2201 movs r2, #1 8000180: 00d2 lsls r2, r2, #3 8000182: 6858 ldr r0, [r3, #4] 8000184: 4008 ands r0, r1 8000186: 4290 cmp r0, r2 8000188: d1fb bne.n 8000182 <rcc_config+0x66> 800018a: 6958 ldr r0, [r3, #20] 800018c: 4906 ldr r1, [pc, #24] ; (80001a8 <rcc_config.ahb_clk_en>) 800018e: 4308 orrs r0, r1 8000190: 6158 str r0, [r3, #20] 8000192: 6998 ldr r0, [r3, #24] 8000194: 4905 ldr r1, [pc, #20] ; (80001ac <rcc_config.apb2_clk_en>) 8000196: 4308 orrs r0, r1 8000198: 6198 str r0, [r3, #24] 800019a: 69d8 ldr r0, [r3, #28] 800019c: 4904 ldr r1, [pc, #16] ; (80001b0 <rcc_config.apb1_clk_en>) 800019e: 4308 orrs r0, r1 80001a0: 61d8 str r0, [r3, #28] 80001a2: 4770 bx lr 080001a4 <rcc_config.rcc_base>: 80001a4: 1000 asrs r0, r0, #32 80001a6: 4002 ands r2, r0 080001a8 <rcc_config.ahb_clk_en>: 80001a8: 0001 movs r1, r0 80001aa: 0006 movs r6, r0 080001ac <rcc_config.apb2_clk_en>: 80001ac: 1a00 subs r0, r0, r0 80001ae: 0000 movs r0, r0 080001b0 <rcc_config.apb1_clk_en>: 80001b0: 0100 lsls r0, r0, #4 80001b2: 0000 movs r0, r0 080001b4 <lcd_spi_init>: 80001b4: b507 push {r0, r1, r2, lr} 80001b6: 4828 ldr r0, [pc, #160] ; (8000258 <lcd_spi_cblock>) 80001b8: 6942 ldr r2, [r0, #20] 80001ba: 2101 movs r1, #1 80001bc: 0449 lsls r1, r1, #17 80001be: 430a orrs r2, r1 80001c0: 2101 movs r1, #1 80001c2: 1c09 adds r1, r1, #0 80001c4: 430a orrs r2, r1 80001c6: 6142 str r2, [r0, #20] 80001c8: 6982 ldr r2, [r0, #24] 80001ca: 2101 movs r1, #1 80001cc: 0309 lsls r1, r1, #12 80001ce: 430a orrs r2, r1 80001d0: 6182 str r2, [r0, #24] 80001d2: 4822 ldr r0, [pc, #136] ; (800025c <lcd_spi_cblock.gpioa_base>) 80001d4: 6882 ldr r2, [r0, #8] 80001d6: 4923 ldr r1, [pc, #140] ; (8000264 <lcd_spi_cblock.gmask_2>) 80001d8: 430a orrs r2, r1 80001da: 6082 str r2, [r0, #8] 80001dc: 6802 ldr r2, [r0, #0] 80001de: 4922 ldr r1, [pc, #136] ; (8000268 <lcd_spi_cblock.gmask_3>) 80001e0: 438a bics r2, r1 80001e2: 491f ldr r1, [pc, #124] ; (8000260 <lcd_spi_cblock.gmask_1>) 80001e4: 430a orrs r2, r1 80001e6: 6002 str r2, [r0, #0] 80001e8: 6a02 ldr r2, [r0, #32] 80001ea: 4920 ldr r1, [pc, #128] ; (800026c <lcd_spi_cblock.gmask_4>) 80001ec: 438a bics r2, r1 80001ee: 6202 str r2, [r0, #32] 80001f0: 4823 ldr r0, [pc, #140] ; (8000280 <lcd_spi_cblock.dma1_ch3>) 80001f2: 4924 ldr r1, [pc, #144] ; (8000284 <lcd_spi_cblock.dma_dest>) 80001f4: 6081 str r1, [r0, #8] 80001f6: 4926 ldr r1, [pc, #152] ; (8000290 <lcd_spi_cblock.dma_ccr>) 80001f8: 6001 str r1, [r0, #0] 80001fa: 481d ldr r0, [pc, #116] ; (8000270 <lcd_spi_cblock.spi_base>) 80001fc: 491d ldr r1, [pc, #116] ; (8000274 <lcd_spi_cblock.cr1_mask>) 80001fe: 8001 strh r1, [r0, #0] 8000200: 491d ldr r1, [pc, #116] ; (8000278 <lcd_spi_cblock.cr2_mask>) 8000202: 8081 strh r1, [r0, #4] 8000204: 2140 movs r1, #64 ; 0x40 8000206: 8802 ldrh r2, [r0, #0] 8000208: 430a orrs r2, r1 800020a: 8002 strh r2, [r0, #0] 800020c: bd07 pop {r0, r1, r2, pc} 0800020e <spi_tx>: spi_tx(): 800020e: b50e push {r1, r2, r3, lr} 8000210: 4917 ldr r1, [pc, #92] ; (8000270 <lcd_spi_cblock.spi_base>) 8000212: 2302 movs r3, #2 8000214: 890a ldrh r2, [r1, #8] 8000216: 421a tst r2, r3 8000218: d0fc beq.n 8000214 <spi_tx+0x6> 800021a: 7308 strb r0, [r1, #12] 800021c: bd0e pop {r1, r2, r3, pc} 0800021e <spi_tx_start>: spi_tx_start(): 800021e: b50f push {r0, r1, r2, r3, lr} 8000220: 4b16 ldr r3, [pc, #88] ; (800027c <lcd_spi_cblock.dma_base>) 8000222: 4a13 ldr r2, [pc, #76] ; (8000270 <lcd_spi_cblock.spi_base>) 8000224: 2101 movs r1, #1 8000226: 0249 lsls r1, r1, #9 8000228: 6818 ldr r0, [r3, #0] 800022a: 4208 tst r0, r1 800022c: d0fc beq.n 8000228 <spi_tx_start+0xa> 800022e: 4308 orrs r0, r1 8000230: 6018 str r0, [r3, #0] 8000232: 2101 movs r1, #1 8000234: 01c9 lsls r1, r1, #7 8000236: 8910 ldrh r0, [r2, #8] 8000238: 4208 tst r0, r1 800023a: d1fc bne.n 8000236 <spi_tx_start+0x18> 800023c: 4b10 ldr r3, [pc, #64] ; (8000280 <lcd_spi_cblock.dma1_ch3>) 800023e: 2101 movs r1, #1 8000240: 6818 ldr r0, [r3, #0] 8000242: 4388 bics r0, r1 8000244: 6018 str r0, [r3, #0] 8000246: 4910 ldr r1, [pc, #64] ; (8000288 <lcd_spi_cblock.dma_src>) 8000248: 60d9 str r1, [r3, #12] 800024a: 4810 ldr r0, [pc, #64] ; (800028c <lcd_spi_cblock.dma_cnt>) 800024c: 6058 str r0, [r3, #4] 800024e: 2101 movs r1, #1 8000250: 6818 ldr r0, [r3, #0] 8000252: 4308 orrs r0, r1 8000254: 6018 str r0, [r3, #0] 8000256: bd0f pop {r0, r1, r2, r3, pc} 08000258 <lcd_spi_cblock>: lcd_spi_cblock(): 8000258: 1000 asrs r0, r0, #32 800025a: 4002 ands r2, r0 0800025c <lcd_spi_cblock.gpioa_base>: 800025c: 0000 movs r0, r0 800025e: 4800 ldr r0, [pc, #0] ; (8000260 <lcd_spi_cblock.gmask_1>) 08000260 <lcd_spi_cblock.gmask_1>: 8000260: 9800 ldr r0, [sp, #0] 8000262: 0000 movs r0, r0 08000264 <lcd_spi_cblock.gmask_2>: 8000264: fc00 0000 stc2 0, cr0, [r0], {-0} 08000268 <lcd_spi_cblock.gmask_3>: 8000268: fc00 0000 stc2 0, cr0, [r0], {-0} 0800026c <lcd_spi_cblock.gmask_4>: 800026c: 0000 movs r0, r0 800026e: f0f0 3000 ; <UNDEFINED> instruction: 0xf0f03000 08000270 <lcd_spi_cblock.spi_base>: 8000270: 3000 adds r0, #0 8000272: 4001 ands r1, r0 08000274 <lcd_spi_cblock.cr1_mask>: 8000274: 0014 movs r4, r2 8000276: 0000 movs r0, r0 08000278 <lcd_spi_cblock.cr2_mask>: 8000278: 0702 lsls r2, r0, #28 800027a: 0000 movs r0, r0 0800027c <lcd_spi_cblock.dma_base>: 800027c: 0000 movs r0, r0 800027e: 4002 ands r2, r0 08000280 <lcd_spi_cblock.dma1_ch3>: 8000280: 0030 movs r0, r6 8000282: 4002 ands r2, r0 08000284 <lcd_spi_cblock.dma_dest>: 8000284: 300c adds r0, #12 8000286: 4001 ands r1, r0 08000288 <lcd_spi_cblock.dma_src>: 8000288: 0000 movs r0, r0 800028a: 2000 movs r0, #0 0800028c <lcd_spi_cblock.dma_cnt>: 800028c: 0360 lsls r0, r4, #13 800028e: 0000 movs r0, r0 08000290 <lcd_spi_cblock.dma_ccr>: 8000290: 0090 lsls r0, r2, #2 8000292: 0000 movs r0, r0 08000294 <lcd_init>: $t(): 8000294: b507 push {r0, r1, r2, lr} 8000296: f7ff ff8d bl 80001b4 <lcd_spi_init> 800029a: 4a0e ldr r2, [pc, #56] ; (80002d4 <lcd_cblock>) 800029c: 2001 movs r0, #1 800029e: 0580 lsls r0, r0, #22 80002a0: 6190 str r0, [r2, #24] 80002a2: 2021 movs r0, #33 ; 0x21 80002a4: f7ff ffb3 bl 800020e <spi_tx> 80002a8: 2013 movs r0, #19 80002aa: f7ff ffb0 bl 800020e <spi_tx> 80002ae: 20c8 movs r0, #200 ; 0xc8 80002b0: f7ff ffad bl 800020e <spi_tx> 80002b4: 2022 movs r0, #34 ; 0x22 80002b6: f7ff ffaa bl 800020e <spi_tx> 80002ba: 200c movs r0, #12 80002bc: f7ff ffa7 bl 800020e <spi_tx> 80002c0: 2101 movs r1, #1 80002c2: 0189 lsls r1, r1, #6 80002c4: 6191 str r1, [r2, #24] 80002c6: 4905 ldr r1, [pc, #20] ; (80002dc <lcd_cblock.buf_size>) 80002c8: 2000 movs r0, #0 80002ca: f7ff ffa0 bl 800020e <spi_tx> 80002ce: 3901 subs r1, #1 80002d0: d1fb bne.n 80002ca <lcd_init+0x36> 80002d2: bd07 pop {r0, r1, r2, pc} 080002d4 <lcd_cblock>: lcd_cblock(): 80002d4: 0000 movs r0, r0 80002d6: 4800 ldr r0, [pc, #0] ; (80002d8 <lcd_cblock.lpbuf>) 080002d8 <lcd_cblock.lpbuf>: 80002d8: 0000 movs r0, r0 80002da: 2000 movs r0, #0 080002dc <lcd_cblock.buf_size>: 80002dc: 0360 lsls r0, r4, #13 80002de: 0000 movs r0, r0 080002e0 <main>: $t(): 80002e0: f7ff ff1c bl 800011c <rcc_config> 80002e4: f7ff ffd6 bl 8000294 <lcd_init> 80002e8: e7fe b.n 80002e8 <main+0x8> Disassembly of section .debug_abbrev: 00000000 <.debug_abbrev>: 0: 1101 asrs r1, r0, #4 2: 0301 lsls r1, r0, #12 4: 2508 movs r5, #8 6: 1108 asrs r0, r1, #4 8: 1201 asrs r1, r0, #8 a: 1001 asrs r1, r0, #32 c: 0006 movs r6, r0 e: 0000 movs r0, r0 Disassembly of section .debug_info: 00000000 <.debug_info>: 0: 0068 lsls r0, r5, #1 2: 0000 movs r0, r0 4: 0002 movs r2, r0 6: 0000 movs r0, r0 8: 0000 movs r0, r0 a: 0104 lsls r4, r0, #4 c: 7364 strb r4, [r4, #13] e: 5f6f ldrsh r7, [r5, r5] 10: 696d ldr r5, [r5, #20] 12: 7263 strb r3, [r4, #9] 14: 2e6f cmp r6, #111 ; 0x6f 16: 7361 strb r1, [r4, #13] 18: 006d lsls r5, r5, #1 1a: 5241 strh r1, [r0, r1] 1c: 764d strb r5, [r1, #25] 1e: 2037 movs r0, #55 ; 0x37 20: 7361 strb r1, [r4, #13] 22: 6573 str r3, [r6, #84] ; 0x54 24: 626d str r5, [r5, #36] ; 0x24 26: 656c str r4, [r5, #84] ; 0x54 28: 2072 movs r0, #114 ; 0x72 2a: 6f63 ldr r3, [r4, #116] ; 0x74 2c: 6572 str r2, [r6, #84] ; 0x54 2e: 7620 strb r0, [r4, #24] 30: 2e31 cmp r6, #49 ; 0x31 32: 3533 adds r5, #51 ; 0x33 34: 6620 str r0, [r4, #96] ; 0x60 36: 726f strb r7, [r5, #9] 38: 6620 str r0, [r4, #96] ; 0x60 3a: 616c str r4, [r5, #20] 3c: 2074 movs r0, #116 ; 0x74 3e: 7361 strb r1, [r4, #13] 40: 6573 str r3, [r6, #84] ; 0x54 42: 626d str r5, [r5, #36] ; 0x24 44: 656c str r4, [r5, #84] ; 0x54 46: 2072 movs r0, #114 ; 0x72 48: 3176 adds r1, #118 ; 0x76 4a: 372e adds r7, #46 ; 0x2e 4c: 2e31 cmp r6, #49 ; 0x31 4e: 3933 subs r1, #51 ; 0x33 50: 6220 str r0, [r4, #32] 52: 2079 movs r0, #121 ; 0x79 54: 6572 str r2, [r6, #84] ; 0x54 56: 6f76 ldr r6, [r6, #116] ; 0x74 58: 756c strb r4, [r5, #21] 5a: 6974 ldr r4, [r6, #20] 5c: 6e6f ldr r7, [r5, #100] ; 0x64 5e: 0000 movs r0, r0 60: 0000 movs r0, r0 62: ff00 ffff vmaxnm.f32 <illegal reg q7.5>, q8, <illegal reg q15.5> 66: 00ff lsls r7, r7, #3 68: 0000 movs r0, r0 6a: 0000 movs r0, r0 Disassembly of section .debug_line: 00000000 <.debug_line>: 0: 0179 lsls r1, r7, #5 2: 0000 movs r0, r0 4: 0002 movs r2, r0 6: 007b lsls r3, r7, #1 8: 0000 movs r0, r0 a: 0101 lsls r1, r0, #4 c: 0600 lsls r0, r0, #24 e: 000a movs r2, r1 10: 0101 lsls r1, r0, #4 12: 0101 lsls r1, r0, #4 14: 0000 movs r0, r0 16: 0000 movs r0, r0 18: 6400 str r0, [r0, #64] ; 0x40 1a: 6f73 ldr r3, [r6, #116] ; 0x74 1c: 6d5f ldr r7, [r3, #84] ; 0x54 1e: 6369 str r1, [r5, #52] ; 0x34 20: 6f72 ldr r2, [r6, #116] ; 0x74 22: 612e str r6, [r5, #16] 24: 6d73 ldr r3, [r6, #84] ; 0x54 26: 0000 movs r0, r0 28: 0000 movs r0, r0 2a: 7270 strb r0, [r6, #9] 2c: 636f str r7, [r5, #52] ; 0x34 2e: 7365 strb r5, [r4, #13] 30: 6f73 ldr r3, [r6, #116] ; 0x74 32: 2e72 cmp r6, #114 ; 0x72 34: 6e69 ldr r1, [r5, #100] ; 0x64 36: 0063 lsls r3, r4, #1 38: 0000 movs r0, r0 3a: 6300 str r0, [r0, #48] ; 0x30 3c: 306d adds r0, #109 ; 0x6d 3e: 692e ldr r6, [r5, #16] 40: 636e str r6, [r5, #52] ; 0x34 42: 0000 movs r0, r0 44: 0000 movs r0, r0 46: 7473 strb r3, [r6, #17] 48: 336d adds r3, #109 ; 0x6d 4a: 6632 str r2, [r6, #96] ; 0x60 4c: 7830 ldrb r0, [r6, #0] 4e: 2e78 cmp r6, #120 ; 0x78 50: 6e69 ldr r1, [r5, #100] ; 0x64 52: 0063 lsls r3, r4, #1 54: 0000 movs r0, r0 56: 7300 strb r0, [r0, #12] 58: 6174 str r4, [r6, #20] 5a: 7472 strb r2, [r6, #17] 5c: 7075 strb r5, [r6, #1] 5e: 612e str r6, [r5, #16] 60: 6d73 ldr r3, [r6, #84] ; 0x54 62: 0000 movs r0, r0 64: 0000 movs r0, r0 66: 6f63 ldr r3, [r4, #116] ; 0x74 68: 666e str r6, [r5, #100] ; 0x64 6a: 6769 str r1, [r5, #116] ; 0x74 6c: 612e str r6, [r5, #16] 6e: 6d73 ldr r3, [r6, #84] ; 0x54 70: 0000 movs r0, r0 72: 0000 movs r0, r0 74: 636c str r4, [r5, #52] ; 0x34 76: 5f64 ldrsh r4, [r4, r5] 78: 3433 adds r4, #51 ; 0x33 7a: 3031 adds r0, #49 ; 0x31 7c: 612e str r6, [r5, #16] 7e: 6d73 ldr r3, [r6, #84] ; 0x54 80: 0000 movs r0, r0 82: 0000 movs r0, r0 84: 0400 lsls r0, r0, #16 86: 0005 movs r5, r0 88: 0205 lsls r5, r0, #8 8a: 0000 movs r0, r0 8c: 0800 lsrs r0, r0, #32 8e: 0703 lsls r3, r0, #28 90: 0201 lsls r1, r0, #8 92: 01c0 lsls r0, r0, #7 94: 3d03 subs r5, #3 96: 1a01 subs r1, r0, r0 98: 1730 asrs r0, r6, #28 9a: 1b17 subs r7, r2, r4 9c: 1717 asrs r7, r2, #28 9e: 1717 asrs r7, r2, #28 a0: 1717 asrs r7, r2, #28 a2: 1817 adds r7, r2, r0 a4: 1717 asrs r7, r2, #28 a6: 1717 asrs r7, r2, #28 a8: 1734 asrs r4, r6, #28 aa: 1717 asrs r7, r2, #28 ac: 1718 asrs r0, r3, #28 ae: 1717 asrs r7, r2, #28 b0: 1717 asrs r7, r2, #28 b2: 1718 asrs r0, r3, #28 b4: 1817 adds r7, r2, r0 b6: 2317 movs r3, #23 b8: 0001 movs r1, r0 ba: 171a asrs r2, r3, #28 bc: 1817 adds r7, r2, r0 be: 0604 lsls r4, r0, #24 c0: 8903 ldrh r3, [r0, #8] c2: 227f movs r2, #127 ; 0x7f c4: 301a adds r0, #26 c6: 3117 adds r1, #23 c8: 1717 asrs r7, r2, #28 ca: 3019 adds r0, #25 cc: 1817 adds r7, r2, r0 ce: 3030 adds r0, #48 ; 0x30 d0: 3030 adds r0, #48 ; 0x30 d2: 1817 adds r7, r2, r0 d4: 1730 asrs r0, r6, #28 d6: 1731 asrs r1, r6, #28 d8: 1817 adds r7, r2, r0 da: 3030 adds r0, #48 ; 0x30 dc: 174a asrs r2, r1, #29 de: 1717 asrs r7, r2, #28 e0: 1719 asrs r1, r3, #28 e2: 1717 asrs r7, r2, #28 e4: 1719 asrs r1, r3, #28 e6: 1717 asrs r7, r2, #28 e8: 1718 asrs r0, r3, #28 ea: 1717 asrs r7, r2, #28 ec: 1918 adds r0, r3, r4 ee: 2323 movs r3, #35 ; 0x23 f0: 0423 lsls r3, r4, #16 f2: 0307 lsls r7, r0, #12 f4: 2276 movs r2, #118 ; 0x76 f6: 1a18 subs r0, r3, r0 f8: 3030 adds r0, #48 ; 0x30 fa: 1717 asrs r7, r2, #28 fc: 1730 asrs r0, r6, #28 fe: 1b18 subs r0, r3, r4 100: 1717 asrs r7, r2, #28 102: 1817 adds r7, r2, r0 104: 1717 asrs r7, r2, #28 106: 1717 asrs r7, r2, #28 108: 1817 adds r7, r2, r0 10a: 1717 asrs r7, r2, #28 10c: 1917 adds r7, r2, r4 10e: 171b asrs r3, r3, #28 110: 1718 asrs r0, r3, #28 112: 1b19 subs r1, r3, r4 114: 1717 asrs r7, r2, #28 116: 1817 adds r7, r2, r0 118: 1717 asrs r7, r2, #28 11a: 1817 adds r7, r2, r0 11c: 171b asrs r3, r3, #28 11e: 181a adds r2, r3, r0 120: 1717 asrs r7, r2, #28 122: 1717 asrs r7, r2, #28 124: 1819 adds r1, r3, r0 126: 171a asrs r2, r3, #28 128: 0603 lsls r3, r0, #24 12a: 1722 asrs r2, r4, #28 12c: 1817 adds r7, r2, r0 12e: 3217 adds r2, #23 130: 1717 asrs r7, r2, #28 132: 1b18 subs r0, r3, r4 134: 1717 asrs r7, r2, #28 136: 1817 adds r7, r2, r0 138: 1817 adds r7, r2, r0 13a: 1817 adds r7, r2, r0 13c: 1717 asrs r7, r2, #28 13e: 1817 adds r7, r2, r0 140: 231a movs r3, #26 142: 2324 movs r3, #36 ; 0x24 144: 2323 movs r3, #35 ; 0x23 146: 2324 movs r3, #36 ; 0x24 148: 2423 movs r4, #35 ; 0x23 14a: 2323 movs r3, #35 ; 0x23 14c: 2323 movs r3, #35 ; 0x23 14e: 0323 lsls r3, r4, #12 150: 00d5 lsls r5, r2, #3 152: 1722 asrs r2, r4, #28 154: 1b24 subs r4, r4, r4 156: 1717 asrs r7, r2, #28 158: 1717 asrs r7, r2, #28 15a: 1723 asrs r3, r4, #28 15c: 1723 asrs r3, r4, #28 15e: 1723 asrs r3, r4, #28 160: 1723 asrs r3, r4, #28 162: 1723 asrs r3, r4, #28 164: 1817 adds r7, r2, r0 166: 1817 adds r7, r2, r0 168: 1723 asrs r3, r4, #28 16a: 0317 lsls r7, r2, #12 16c: 0385 lsls r5, r0, #14 16e: 2416 movs r4, #22 170: 0423 lsls r3, r4, #16 172: 0301 lsls r1, r0, #12 174: 7ab7 ldrb r7, [r6, #10] 176: 2322 movs r3, #34 ; 0x22 178: 1726 asrs r6, r4, #28 17a: 0100 lsls r0, r0, #4 17c: 0001 movs r1, r0 17e: 0000 movs r0, r0 D:\ARM\DSI\Source>readelf.exe dso_micro.axf -a ELF Header: Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2's complement, little endian Version: 1 (current) OS/ABI: UNIX - System V ABI Version: 0 Type: EXEC (Executable file) Machine: ARM Version: 0x1 Entry point address: 0x8000112 Start of program headers: 52 (bytes into file) Start of section headers: 3000 (bytes into file) Flags: 0x2000016, has entry point, Version2 EABI, sorted symbol tables, mapping symbols precede others Size of this header: 52 (bytes) Size of program headers: 32 (bytes) Number of program headers: 1 Size of section headers: 40 (bytes) Number of section headers: 8 Section header string table index: 2 Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS 08000000 000054 0002ea 00 AX 0 0 2 [ 2] .shstrtab STRTAB 00000000 00033e 00004a 00 0 0 0 [ 3] .debug_abbrev PROGBITS 00000000 000388 000010 00 0 0 0 [ 4] .debug_info PROGBITS 00000000 000398 00006c 00 0 0 0 [ 5] .debug_line PROGBITS 00000000 000404 000180 00 0 0 0 [ 6] .symtab SYMTAB 00000000 000584 000350 10 7 12 4 [ 7] .strtab STRTAB 00000000 0008d4 0002e4 00 0 0 0 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings) I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific) There are no section groups in this file. Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x000054 0x08000000 0x08000000 0x002ea 0x002ea R E 0x2 Section to Segment mapping: Segment Sections... 00 .text There is no dynamic section in this file. There are no relocations in this file. There are no unwind sections in this file. Symbol table '.symtab' contains 53 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 OBJECT LOCAL DEFAULT UND $d 2: 080000c0 0 FUNC LOCAL DEFAULT 1 $t 3: 08000102 52 OBJECT LOCAL DEFAULT 1 $d 4: 08000110 1 FUNC LOCAL DEFAULT 1 $t 5: 08000118 0 OBJECT LOCAL DEFAULT 1 $d 6: 0800011c 0 FUNC LOCAL DEFAULT 1 $t 7: 080001a4 0 OBJECT LOCAL DEFAULT 1 $d 8: 080001b4 0 FUNC LOCAL DEFAULT 1 $t 9: 08000258 0 OBJECT LOCAL DEFAULT 1 $d 10: 08000294 0 FUNC LOCAL DEFAULT 1 $t 11: 080002d4 0 OBJECT LOCAL DEFAULT 1 $d 12: 080002e0 0 FUNC LOCAL DEFAULT 1 $t 13: 080002ea 0 OBJECT LOCAL DEFAULT UND $d 14: 08000288 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.dma_src 15: 080002dc 4 OBJECT LOCAL DEFAULT 1 lcd_cblock.buf_size 16: 08000270 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.spi_base 17: 08000118 4 OBJECT LOCAL DEFAULT 1 _reset_handler.start_code 18: 0800027c 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.dma_base 19: 080001ac 4 OBJECT LOCAL DEFAULT 1 rcc_config.apb2_clk_en 20: 08000258 0 FUNC LOCAL DEFAULT 1 lcd_spi_cblock 21: 0800025c 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.gpioa_base 22: 0800010c 4 OBJECT LOCAL DEFAULT 1 _blink.delay 23: 08000000 0 FUNC LOCAL DEFAULT 1 _vectors 24: 080002d8 4 OBJECT LOCAL DEFAULT 1 lcd_cblock.lpbuf 25: 0800020e 0 FUNC LOCAL DEFAULT 1 spi_tx 26: 08000108 4 OBJECT LOCAL DEFAULT 1 _blink.rcc_base 27: 08000280 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.dma1_ch3 28: 08000112 0 FUNC LOCAL DEFAULT 1 _reset_handler 29: 080001a4 4 OBJECT LOCAL DEFAULT 1 rcc_config.rcc_base 30: 080000e8 0 FUNC LOCAL DEFAULT 1 _blink.blink_loop 31: 080002d4 0 FUNC LOCAL DEFAULT 1 lcd_cblock 32: 080001a8 4 OBJECT LOCAL DEFAULT 1 rcc_config.ahb_clk_en 33: 080002d4 4 OBJECT LOCAL DEFAULT 1 lcd_cblock.gpioa_base 34: 080002e0 0 FUNC LOCAL DEFAULT 1 main 35: 08000110 0 FUNC LOCAL DEFAULT 1 _default_handler 36: 080000c0 0 FUNC LOCAL DEFAULT 1 _blink 37: 08000258 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.rcc_base 38: 080001b0 4 OBJECT LOCAL DEFAULT 1 rcc_config.apb1_clk_en 39: 08000290 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.dma_ccr 40: 08000104 4 OBJECT LOCAL DEFAULT 1 _blink.gpioa_base 41: 08000268 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.gmask_3 42: 0800026c 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.gmask_4 43: 08000260 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.gmask_1 44: 08000264 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.gmask_2 45: 0800011c 0 FUNC LOCAL DEFAULT 1 rcc_config 46: 08000278 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.cr2_mask 47: 0800028c 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.dma_cnt 48: 0800021e 0 FUNC LOCAL DEFAULT 1 spi_tx_start 49: 080001b4 0 FUNC LOCAL DEFAULT 1 lcd_spi_init 50: 08000284 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.dma_dest 51: 08000294 0 FUNC LOCAL DEFAULT 1 lcd_init 52: 08000274 4 OBJECT LOCAL DEFAULT 1 lcd_spi_cblock.cr1_mask No version information found in this file. But line number info still invalid 
Flie dso_micro.asm contains only 33 lines, line 96 or above is impossible. |
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01 Oct 2015, 12:34 |
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revolution 01 Oct 2015, 13:08
Andrew Martin wrote: But line number info still invalid |
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01 Oct 2015, 13:08 |
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Andrew Martin 01 Oct 2015, 16:16
revolution wrote: Yes, unfortunately it appears to be wrong. I'll look into that. Thank you for your hard work  FASMARM is nice tool for MCU programming. |
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01 Oct 2015, 16:16 |
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revolution 05 Oct 2015, 01:32
Andrew Martin: Can you please try this file for the line numbers and symbol names debugging info.
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05 Oct 2015, 01:32 |
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Andrew Martin 05 Oct 2015, 06:24
Now line numbers displays correctly
Thank you!
Code: D:\ARM\DSI\Source>objdump.exe -m arm -EL -l -t --dwarf=decodedline --disassembler-options=force-thumb --disassemble-zeroes -D dso_micro.axf dso_micro.axf: file format elf32-littlearm SYMBOL TABLE: 08000288 l O .text 00000004 lcd_spi_cblock.dma_src 080002dc l O .text 00000004 lcd_cblock.buf_size 08000270 l O .text 00000004 lcd_spi_cblock.spi_base 08000118 l O .text 00000004 _reset_handler.start_code 0800027c l O .text 00000004 lcd_spi_cblock.dma_base 080001ac l O .text 00000004 rcc_config.apb2_clk_en 08000258 l F .text 00000000 lcd_spi_cblock 0800025c l O .text 00000004 lcd_spi_cblock.gpioa_base 0800010c l O .text 00000004 _blink.delay 08000000 l F .text 00000000 _vectors 080002d8 l O .text 00000004 lcd_cblock.lpbuf 0800020e l F .text 00000000 spi_tx 08000108 l O .text 00000004 _blink.rcc_base 08000280 l O .text 00000004 lcd_spi_cblock.dma1_ch3 08000112 l F .text 00000000 _reset_handler 080001a4 l O .text 00000004 rcc_config.rcc_base 080000e8 l F .text 00000000 _blink.blink_loop 080002d4 l F .text 00000000 lcd_cblock 080001a8 l O .text 00000004 rcc_config.ahb_clk_en 080002d4 l O .text 00000004 lcd_cblock.gpioa_base 080002e0 l F .text 00000000 main 08000110 l F .text 00000000 _default_handler 080000c0 l F .text 00000000 _blink 08000258 l O .text 00000004 lcd_spi_cblock.rcc_base 080001b0 l O .text 00000004 rcc_config.apb1_clk_en 08000290 l O .text 00000004 lcd_spi_cblock.dma_ccr 08000104 l O .text 00000004 _blink.gpioa_base 08000268 l O .text 00000004 lcd_spi_cblock.gmask_3 0800026c l O .text 00000004 lcd_spi_cblock.gmask_4 08000260 l O .text 00000004 lcd_spi_cblock.gmask_1 08000264 l O .text 00000004 lcd_spi_cblock.gmask_2 0800011c l F .text 00000000 rcc_config 08000278 l O .text 00000004 lcd_spi_cblock.cr2_mask 0800028c l O .text 00000004 lcd_spi_cblock.dma_cnt 0800021e l F .text 00000000 spi_tx_start 080001b4 l F .text 00000000 lcd_spi_init 08000284 l O .text 00000004 lcd_spi_cblock.dma_dest 08000294 l F .text 00000000 lcd_init 08000274 l O .text 00000004 lcd_spi_cblock.cr1_mask Decoded dump of debug contents of section .debug_line: CU: dso_micro.asm: File name Line number Starting address ./startup.asm:[++] startup.asm 8 0x8000000 startup.asm 69 0x80000c0 startup.asm 73 0x80000c2 startup.asm 75 0x80000c8 startup.asm 76 0x80000ca startup.asm 77 0x80000cc startup.asm 82 0x80000ce startup.asm 83 0x80000d0 startup.asm 84 0x80000d2 startup.asm 85 0x80000d4 startup.asm 86 0x80000d6 startup.asm 87 0x80000d8 startup.asm 88 0x80000da startup.asm 89 0x80000dc startup.asm 91 0x80000de startup.asm 92 0x80000e0 startup.asm 93 0x80000e2 startup.asm 94 0x80000e4 startup.asm 95 0x80000e6 startup.asm 97 0x80000e8 startup.asm 98 0x80000ea startup.asm 99 0x80000ec startup.asm 100 0x80000ee startup.asm 102 0x80000f0 startup.asm 103 0x80000f2 startup.asm 104 0x80000f4 startup.asm 105 0x80000f6 startup.asm 106 0x80000f8 startup.asm 107 0x80000fa startup.asm 109 0x80000fc startup.asm 110 0x80000fe startup.asm 111 0x8000100 startup.asm 113 0x8000102 startup.asm 114 0x8000104 startup.asm 115 0x8000108 startup.asm 116 0x800010c startup.asm 120 0x8000110 startup.asm 124 0x8000112 startup.asm 125 0x8000114 startup.asm 126 0x8000116 startup.asm 128 0x8000118 ./config.asm:[++] config.asm 9 0x800011c config.asm 13 0x800011e config.asm 15 0x8000124 config.asm 16 0x8000126 config.asm 19 0x800012c config.asm 20 0x800012e config.asm 21 0x8000130 config.asm 24 0x8000132 config.asm 26 0x8000138 config.asm 27 0x800013a config.asm 29 0x800013c config.asm 31 0x8000142 config.asm 33 0x8000148 config.asm 35 0x800014e config.asm 37 0x8000154 config.asm 38 0x8000156 config.asm 40 0x8000158 config.asm 42 0x800015e config.asm 43 0x8000160 config.asm 46 0x8000166 config.asm 47 0x8000168 config.asm 48 0x800016a config.asm 50 0x800016c config.asm 52 0x8000172 config.asm 54 0x8000178 config.asm 58 0x8000182 config.asm 59 0x8000184 config.asm 60 0x8000186 config.asm 61 0x8000188 config.asm 64 0x800018a config.asm 65 0x800018c config.asm 66 0x800018e config.asm 67 0x8000190 config.asm 70 0x8000192 config.asm 71 0x8000194 config.asm 72 0x8000196 config.asm 73 0x8000198 config.asm 75 0x800019a config.asm 76 0x800019c config.asm 77 0x800019e config.asm 78 0x80001a0 config.asm 80 0x80001a2 config.asm 83 0x80001a4 config.asm 84 0x80001a8 config.asm 85 0x80001ac config.asm 86 0x80001b0 ./lcd_3410.asm:[++] lcd_3410.asm 76 0x80001b4 lcd_3410.asm 78 0x80001b6 lcd_3410.asm 82 0x80001b8 lcd_3410.asm 84 0x80001be lcd_3410.asm 86 0x80001c4 lcd_3410.asm 87 0x80001c6 lcd_3410.asm 88 0x80001c8 lcd_3410.asm 90 0x80001ce lcd_3410.asm 91 0x80001d0 lcd_3410.asm 93 0x80001d2 lcd_3410.asm 98 0x80001d4 lcd_3410.asm 99 0x80001d6 lcd_3410.asm 100 0x80001d8 lcd_3410.asm 101 0x80001da lcd_3410.asm 103 0x80001dc lcd_3410.asm 104 0x80001de lcd_3410.asm 105 0x80001e0 lcd_3410.asm 106 0x80001e2 lcd_3410.asm 107 0x80001e4 lcd_3410.asm 108 0x80001e6 lcd_3410.asm 110 0x80001e8 lcd_3410.asm 111 0x80001ea lcd_3410.asm 112 0x80001ec lcd_3410.asm 113 0x80001ee lcd_3410.asm 116 0x80001f0 lcd_3410.asm 121 0x80001f2 lcd_3410.asm 122 0x80001f4 lcd_3410.asm 124 0x80001f6 lcd_3410.asm 125 0x80001f8 lcd_3410.asm 128 0x80001fa lcd_3410.asm 133 0x80001fc lcd_3410.asm 134 0x80001fe lcd_3410.asm 135 0x8000200 lcd_3410.asm 136 0x8000202 lcd_3410.asm 138 0x8000204 lcd_3410.asm 139 0x8000206 lcd_3410.asm 140 0x8000208 lcd_3410.asm 141 0x800020a lcd_3410.asm 143 0x800020c lcd_3410.asm 148 0x800020e lcd_3410.asm 149 0x8000210 lcd_3410.asm 153 0x8000212 lcd_3410.asm 155 0x8000214 lcd_3410.asm 156 0x8000216 lcd_3410.asm 157 0x8000218 lcd_3410.asm 158 0x800021a lcd_3410.asm 159 0x800021c lcd_3410.asm 162 0x800021e lcd_3410.asm 164 0x8000220 lcd_3410.asm 168 0x8000222 lcd_3410.asm 169 0x8000224 lcd_3410.asm 175 0x8000228 lcd_3410.asm 176 0x800022a lcd_3410.asm 177 0x800022c lcd_3410.asm 179 0x800022e lcd_3410.asm 180 0x8000230 lcd_3410.asm 184 0x8000236 lcd_3410.asm 185 0x8000238 lcd_3410.asm 186 0x800023a lcd_3410.asm 188 0x800023c lcd_3410.asm 193 0x800023e lcd_3410.asm 194 0x8000240 lcd_3410.asm 195 0x8000242 lcd_3410.asm 196 0x8000244 lcd_3410.asm 198 0x8000246 lcd_3410.asm 199 0x8000248 lcd_3410.asm 201 0x800024a lcd_3410.asm 202 0x800024c lcd_3410.asm 204 0x800024e lcd_3410.asm 205 0x8000250 lcd_3410.asm 206 0x8000252 lcd_3410.asm 207 0x8000254 lcd_3410.asm 209 0x8000256 lcd_3410.asm 213 0x8000258 lcd_3410.asm 214 0x800025c lcd_3410.asm 216 0x8000260 lcd_3410.asm 217 0x8000264 lcd_3410.asm 218 0x8000268 lcd_3410.asm 219 0x800026c lcd_3410.asm 221 0x8000270 lcd_3410.asm 222 0x8000274 lcd_3410.asm 223 0x8000278 lcd_3410.asm 225 0x800027c lcd_3410.asm 226 0x8000280 lcd_3410.asm 227 0x8000284 lcd_3410.asm 228 0x8000288 lcd_3410.asm 229 0x800028c lcd_3410.asm 230 0x8000290 lcd_3410.asm 315 0x8000294 lcd_3410.asm 316 0x8000296 lcd_3410.asm 318 0x800029a lcd_3410.asm 323 0x800029c lcd_3410.asm 324 0x800029e lcd_3410.asm 325 0x80002a0 lcd_3410.asm 326 0x80002a2 lcd_3410.asm 327 0x80002a4 lcd_3410.asm 328 0x80002a8 lcd_3410.asm 329 0x80002aa lcd_3410.asm 330 0x80002ae lcd_3410.asm 331 0x80002b0 lcd_3410.asm 332 0x80002b4 lcd_3410.asm 333 0x80002b6 lcd_3410.asm 334 0x80002ba lcd_3410.asm 335 0x80002bc lcd_3410.asm 336 0x80002c0 lcd_3410.asm 337 0x80002c2 lcd_3410.asm 338 0x80002c4 lcd_3410.asm 340 0x80002c6 lcd_3410.asm 341 0x80002c8 lcd_3410.asm 343 0x80002ca lcd_3410.asm 344 0x80002ce lcd_3410.asm 345 0x80002d0 lcd_3410.asm 346 0x80002d2 lcd_3410.asm 735 0x80002d4 lcd_3410.asm 737 0x80002d8 lcd_3410.asm 738 0x80002dc ./dso_micro.asm:[++] dso_micro.asm 25 0x80002e0 dso_micro.asm 26 0x80002e4 dso_micro.asm 30 0x80002e8 dso_micro.asm 31 0x80002ea Disassembly of section .text: 08000000 <_vectors>: _vectors(): startup.asm:8 8000000: 1000 asrs r0, r0, #32 8000002: 2000 movs r0, #0 8000004: 0113 lsls r3, r2, #4 8000006: 0800 lsrs r0, r0, #32 8000008: 00c1 lsls r1, r0, #3 800000a: 0800 lsrs r0, r0, #32 800000c: 00c1 lsls r1, r0, #3 800000e: 0800 lsrs r0, r0, #32 8000010: 0111 lsls r1, r2, #4 8000012: 0800 lsrs r0, r0, #32 8000014: 0111 lsls r1, r2, #4 8000016: 0800 lsrs r0, r0, #32 8000018: 0111 lsls r1, r2, #4 800001a: 0800 lsrs r0, r0, #32 800001c: 0111 lsls r1, r2, #4 800001e: 0800 lsrs r0, r0, #32 8000020: 0111 lsls r1, r2, #4 8000022: 0800 lsrs r0, r0, #32 8000024: 0111 lsls r1, r2, #4 8000026: 0800 lsrs r0, r0, #32 8000028: 0111 lsls r1, r2, #4 800002a: 0800 lsrs r0, r0, #32 800002c: 0111 lsls r1, r2, #4 800002e: 0800 lsrs r0, r0, #32 8000030: 0111 lsls r1, r2, #4 8000032: 0800 lsrs r0, r0, #32 8000034: 0111 lsls r1, r2, #4 8000036: 0800 lsrs r0, r0, #32 8000038: 0111 lsls r1, r2, #4 800003a: 0800 lsrs r0, r0, #32 800003c: 0111 lsls r1, r2, #4 800003e: 0800 lsrs r0, r0, #32 8000040: 0111 lsls r1, r2, #4 8000042: 0800 lsrs r0, r0, #32 8000044: 0111 lsls r1, r2, #4 8000046: 0800 lsrs r0, r0, #32 8000048: 0111 lsls r1, r2, #4 800004a: 0800 lsrs r0, r0, #32 800004c: 0111 lsls r1, r2, #4 800004e: 0800 lsrs r0, r0, #32 8000050: 0111 lsls r1, r2, #4 8000052: 0800 lsrs r0, r0, #32 8000054: 0111 lsls r1, r2, #4 8000056: 0800 lsrs r0, r0, #32 8000058: 0111 lsls r1, r2, #4 800005a: 0800 lsrs r0, r0, #32 800005c: 0111 lsls r1, r2, #4 800005e: 0800 lsrs r0, r0, #32 8000060: 0111 lsls r1, r2, #4 8000062: 0800 lsrs r0, r0, #32 8000064: 0111 lsls r1, r2, #4 8000066: 0800 lsrs r0, r0, #32 8000068: 0111 lsls r1, r2, #4 800006a: 0800 lsrs r0, r0, #32 800006c: 0111 lsls r1, r2, #4 800006e: 0800 lsrs r0, r0, #32 8000070: 0111 lsls r1, r2, #4 8000072: 0800 lsrs r0, r0, #32 8000074: 0111 lsls r1, r2, #4 8000076: 0800 lsrs r0, r0, #32 8000078: 0111 lsls r1, r2, #4 800007a: 0800 lsrs r0, r0, #32 800007c: 0111 lsls r1, r2, #4 800007e: 0800 lsrs r0, r0, #32 8000080: 0111 lsls r1, r2, #4 8000082: 0800 lsrs r0, r0, #32 8000084: 0111 lsls r1, r2, #4 8000086: 0800 lsrs r0, r0, #32 8000088: 0111 lsls r1, r2, #4 800008a: 0800 lsrs r0, r0, #32 800008c: 0111 lsls r1, r2, #4 800008e: 0800 lsrs r0, r0, #32 8000090: 0111 lsls r1, r2, #4 8000092: 0800 lsrs r0, r0, #32 8000094: 0111 lsls r1, r2, #4 8000096: 0800 lsrs r0, r0, #32 8000098: 0111 lsls r1, r2, #4 800009a: 0800 lsrs r0, r0, #32 800009c: 0111 lsls r1, r2, #4 800009e: 0800 lsrs r0, r0, #32 80000a0: 0111 lsls r1, r2, #4 80000a2: 0800 lsrs r0, r0, #32 80000a4: 0111 lsls r1, r2, #4 80000a6: 0800 lsrs r0, r0, #32 80000a8: 0111 lsls r1, r2, #4 80000aa: 0800 lsrs r0, r0, #32 80000ac: 0111 lsls r1, r2, #4 80000ae: 0800 lsrs r0, r0, #32 80000b0: 0111 lsls r1, r2, #4 80000b2: 0800 lsrs r0, r0, #32 80000b4: 0111 lsls r1, r2, #4 80000b6: 0800 lsrs r0, r0, #32 80000b8: 0111 lsls r1, r2, #4 80000ba: 0800 lsrs r0, r0, #32 80000bc: 0111 lsls r1, r2, #4 80000be: 0800 lsrs r0, r0, #32 080000c0 <_blink>: $t(): startup.asm:69 80000c0: 4811 ldr r0, [pc, #68] ; (8000108 <_blink.rcc_base>) startup.asm:73 80000c2: 6942 ldr r2, [r0, #20] 80000c4: 2101 movs r1, #1 80000c6: 0449 lsls r1, r1, #17 startup.asm:75 80000c8: 430a orrs r2, r1 startup.asm:76 80000ca: 6142 str r2, [r0, #20] startup.asm:77 80000cc: 480d ldr r0, [pc, #52] ; (8000104 <_blink.gpioa_base>) startup.asm:82 80000ce: 6802 ldr r2, [r0, #0] startup.asm:83 80000d0: 2103 movs r1, #3 startup.asm:84 80000d2: 0189 lsls r1, r1, #6 startup.asm:85 80000d4: 438a bics r2, r1 startup.asm:86 80000d6: 2101 movs r1, #1 startup.asm:87 80000d8: 0189 lsls r1, r1, #6 startup.asm:88 80000da: 430a orrs r2, r1 startup.asm:89 80000dc: 6002 str r2, [r0, #0] startup.asm:91 80000de: 6882 ldr r2, [r0, #8] startup.asm:92 80000e0: 2103 movs r1, #3 startup.asm:93 80000e2: 0189 lsls r1, r1, #6 startup.asm:94 80000e4: 430a orrs r2, r1 startup.asm:95 80000e6: 6082 str r2, [r0, #8] 080000e8 <_blink.blink_loop>: _blink.blink_loop(): startup.asm:97 80000e8: 2101 movs r1, #1 startup.asm:98 80000ea: 00c9 lsls r1, r1, #3 startup.asm:99 80000ec: 6181 str r1, [r0, #24] startup.asm:100 80000ee: 4907 ldr r1, [pc, #28] ; (800010c <_blink.delay>) startup.asm:102 80000f0: 3901 subs r1, #1 startup.asm:103 80000f2: d1fd bne.n 80000f0 <_blink.blink_loop+0x8> startup.asm:104 80000f4: 2101 movs r1, #1 startup.asm:105 80000f6: 04c9 lsls r1, r1, #19 startup.asm:106 80000f8: 6181 str r1, [r0, #24] startup.asm:107 80000fa: 4904 ldr r1, [pc, #16] ; (800010c <_blink.delay>) startup.asm:109 80000fc: 3901 subs r1, #1 startup.asm:110 80000fe: d1fd bne.n 80000fc <_blink.blink_loop+0x14> startup.asm:111 8000100: e7f2 b.n 80000e8 <_blink.blink_loop> startup.asm:113 8000102: ffff 0000 vaddl.u<illegal width 64> q8, d15, d0 08000104 <_blink.gpioa_base>: startup.asm:114 8000104: 0000 movs r0, r0 8000106: 4800 ldr r0, [pc, #0] ; (8000108 <_blink.rcc_base>) 08000108 <_blink.rcc_base>: startup.asm:115 8000108: 1000 asrs r0, r0, #32 800010a: 4002 ands r2, r0 0800010c <_blink.delay>: startup.asm:116 800010c: cfc0 ldmia r7, {r6, r7} 800010e: 006a lsls r2, r5, #1 08000110 <_default_handler>: $t(): startup.asm:120 8000110: 4770 bx lr 08000112 <_reset_handler>: _reset_handler(): startup.asm:124 8000112: b672 cpsid i startup.asm:125 8000114: 4800 ldr r0, [pc, #0] ; (8000118 <_reset_handler.start_code>) startup.asm:126 8000116: 4700 bx r0 08000118 <_reset_handler.start_code>: startup.asm:128 8000118: 02e1 lsls r1, r4, #11 800011a: 0800 lsrs r0, r0, #32 0800011c <rcc_config>: $t(): config.asm:9 800011c: 4b21 ldr r3, [pc, #132] ; (80001a4 <rcc_config.rcc_base>) config.asm:13 800011e: 6818 ldr r0, [r3, #0] 8000120: 2101 movs r1, #1 8000122: 0409 lsls r1, r1, #16 config.asm:15 8000124: 4308 orrs r0, r1 config.asm:16 8000126: 6018 str r0, [r3, #0] 8000128: 2101 movs r1, #1 800012a: 0449 lsls r1, r1, #17 config.asm:19 800012c: 6818 ldr r0, [r3, #0] config.asm:20 800012e: 4208 tst r0, r1 config.asm:21 8000130: d0fc beq.n 800012c <rcc_config+0x10> config.asm:24 8000132: 6858 ldr r0, [r3, #4] 8000134: 210f movs r1, #15 8000136: 1c09 adds r1, r1, #0 config.asm:26 8000138: 4388 bics r0, r1 config.asm:27 800013a: 6058 str r0, [r3, #4] config.asm:29 800013c: 6858 ldr r0, [r3, #4] 800013e: 210f movs r1, #15 8000140: 0489 lsls r1, r1, #18 config.asm:31 8000142: 4388 bics r0, r1 8000144: 2101 movs r1, #1 8000146: 0409 lsls r1, r1, #16 config.asm:33 8000148: 4308 orrs r0, r1 800014a: 210f movs r1, #15 800014c: 0109 lsls r1, r1, #4 config.asm:35 800014e: 4388 bics r0, r1 8000150: 2107 movs r1, #7 8000152: 0209 lsls r1, r1, #8 config.asm:37 8000154: 4388 bics r0, r1 config.asm:38 8000156: 6058 str r0, [r3, #4] config.asm:40 8000158: 6818 ldr r0, [r3, #0] 800015a: 2101 movs r1, #1 800015c: 0609 lsls r1, r1, #24 config.asm:42 800015e: 4308 orrs r0, r1 config.asm:43 8000160: 6018 str r0, [r3, #0] 8000162: 2101 movs r1, #1 8000164: 0649 lsls r1, r1, #25 config.asm:46 8000166: 6818 ldr r0, [r3, #0] config.asm:47 8000168: 4208 tst r0, r1 config.asm:48 800016a: d0fc beq.n 8000166 <rcc_config+0x4a> config.asm:50 800016c: 6858 ldr r0, [r3, #4] 800016e: 2103 movs r1, #3 8000170: 1c09 adds r1, r1, #0 config.asm:52 8000172: 4388 bics r0, r1 8000174: 2101 movs r1, #1 8000176: 0049 lsls r1, r1, #1 config.asm:54 8000178: 6058 str r0, [r3, #4] 800017a: 2103 movs r1, #3 800017c: 0089 lsls r1, r1, #2 800017e: 2201 movs r2, #1 8000180: 00d2 lsls r2, r2, #3 config.asm:58 8000182: 6858 ldr r0, [r3, #4] config.asm:59 8000184: 4008 ands r0, r1 config.asm:60 8000186: 4290 cmp r0, r2 config.asm:61 8000188: d1fb bne.n 8000182 <rcc_config+0x66> config.asm:64 800018a: 6958 ldr r0, [r3, #20] config.asm:65 800018c: 4906 ldr r1, [pc, #24] ; (80001a8 <rcc_config.ahb_clk_en>) config.asm:66 800018e: 4308 orrs r0, r1 config.asm:67 8000190: 6158 str r0, [r3, #20] config.asm:70 8000192: 6998 ldr r0, [r3, #24] config.asm:71 8000194: 4905 ldr r1, [pc, #20] ; (80001ac <rcc_config.apb2_clk_en>) config.asm:72 8000196: 4308 orrs r0, r1 config.asm:73 8000198: 6198 str r0, [r3, #24] config.asm:75 800019a: 69d8 ldr r0, [r3, #28] config.asm:76 800019c: 4904 ldr r1, [pc, #16] ; (80001b0 <rcc_config.apb1_clk_en>) config.asm:77 800019e: 4308 orrs r0, r1 config.asm:78 80001a0: 61d8 str r0, [r3, #28] config.asm:80 80001a2: 4770 bx lr 080001a4 <rcc_config.rcc_base>: config.asm:83 80001a4: 1000 asrs r0, r0, #32 80001a6: 4002 ands r2, r0 080001a8 <rcc_config.ahb_clk_en>: config.asm:84 80001a8: 0001 movs r1, r0 80001aa: 0006 movs r6, r0 080001ac <rcc_config.apb2_clk_en>: config.asm:85 80001ac: 1a00 subs r0, r0, r0 80001ae: 0000 movs r0, r0 080001b0 <rcc_config.apb1_clk_en>: config.asm:86 80001b0: 0100 lsls r0, r0, #4 80001b2: 0000 movs r0, r0 080001b4 <lcd_spi_init>: lcd_3410.asm:76 80001b4: b507 push {r0, r1, r2, lr} lcd_3410.asm:78 80001b6: 4828 ldr r0, [pc, #160] ; (8000258 <lcd_spi_cblock>) lcd_3410.asm:82 80001b8: 6942 ldr r2, [r0, #20] 80001ba: 2101 movs r1, #1 80001bc: 0449 lsls r1, r1, #17 lcd_3410.asm:84 80001be: 430a orrs r2, r1 80001c0: 2101 movs r1, #1 80001c2: 1c09 adds r1, r1, #0 lcd_3410.asm:86 80001c4: 430a orrs r2, r1 lcd_3410.asm:87 80001c6: 6142 str r2, [r0, #20] lcd_3410.asm:88 80001c8: 6982 ldr r2, [r0, #24] 80001ca: 2101 movs r1, #1 80001cc: 0309 lsls r1, r1, #12 lcd_3410.asm:90 80001ce: 430a orrs r2, r1 lcd_3410.asm:91 80001d0: 6182 str r2, [r0, #24] lcd_3410.asm:93 80001d2: 4822 ldr r0, [pc, #136] ; (800025c <lcd_spi_cblock.gpioa_base>) lcd_3410.asm:98 80001d4: 6882 ldr r2, [r0, #8] lcd_3410.asm:99 80001d6: 4923 ldr r1, [pc, #140] ; (8000264 <lcd_spi_cblock.gmask_2>) lcd_3410.asm:100 80001d8: 430a orrs r2, r1 lcd_3410.asm:101 80001da: 6082 str r2, [r0, #8] lcd_3410.asm:103 80001dc: 6802 ldr r2, [r0, #0] lcd_3410.asm:104 80001de: 4922 ldr r1, [pc, #136] ; (8000268 <lcd_spi_cblock.gmask_3>) lcd_3410.asm:105 80001e0: 438a bics r2, r1 lcd_3410.asm:106 80001e2: 491f ldr r1, [pc, #124] ; (8000260 <lcd_spi_cblock.gmask_1>) lcd_3410.asm:107 80001e4: 430a orrs r2, r1 lcd_3410.asm:108 80001e6: 6002 str r2, [r0, #0] lcd_3410.asm:110 80001e8: 6a02 ldr r2, [r0, #32] lcd_3410.asm:111 80001ea: 4920 ldr r1, [pc, #128] ; (800026c <lcd_spi_cblock.gmask_4>) lcd_3410.asm:112 80001ec: 438a bics r2, r1 lcd_3410.asm:113 80001ee: 6202 str r2, [r0, #32] lcd_3410.asm:116 80001f0: 4823 ldr r0, [pc, #140] ; (8000280 <lcd_spi_cblock.dma1_ch3>) lcd_3410.asm:121 80001f2: 4924 ldr r1, [pc, #144] ; (8000284 <lcd_spi_cblock.dma_dest>) lcd_3410.asm:122 80001f4: 6081 str r1, [r0, #8] lcd_3410.asm:124 80001f6: 4926 ldr r1, [pc, #152] ; (8000290 <lcd_spi_cblock.dma_ccr>) lcd_3410.asm:125 80001f8: 6001 str r1, [r0, #0] lcd_3410.asm:128 80001fa: 481d ldr r0, [pc, #116] ; (8000270 <lcd_spi_cblock.spi_base>) lcd_3410.asm:133 80001fc: 491d ldr r1, [pc, #116] ; (8000274 <lcd_spi_cblock.cr1_mask>) lcd_3410.asm:134 80001fe: 8001 strh r1, [r0, #0] lcd_3410.asm:135 8000200: 491d ldr r1, [pc, #116] ; (8000278 <lcd_spi_cblock.cr2_mask>) lcd_3410.asm:136 8000202: 8081 strh r1, [r0, #4] lcd_3410.asm:138 8000204: 2140 movs r1, #64 ; 0x40 lcd_3410.asm:139 8000206: 8802 ldrh r2, [r0, #0] lcd_3410.asm:140 8000208: 430a orrs r2, r1 lcd_3410.asm:141 800020a: 8002 strh r2, [r0, #0] lcd_3410.asm:143 800020c: bd07 pop {r0, r1, r2, pc} 0800020e <spi_tx>: spi_tx(): lcd_3410.asm:148 800020e: b50e push {r1, r2, r3, lr} lcd_3410.asm:149 8000210: 4917 ldr r1, [pc, #92] ; (8000270 <lcd_spi_cblock.spi_base>) lcd_3410.asm:153 8000212: 2302 movs r3, #2 lcd_3410.asm:155 8000214: 890a ldrh r2, [r1, #8] lcd_3410.asm:156 8000216: 421a tst r2, r3 lcd_3410.asm:157 8000218: d0fc beq.n 8000214 <spi_tx+0x6> lcd_3410.asm:158 800021a: 7308 strb r0, [r1, #12] lcd_3410.asm:159 800021c: bd0e pop {r1, r2, r3, pc} 0800021e <spi_tx_start>: spi_tx_start(): lcd_3410.asm:162 800021e: b50f push {r0, r1, r2, r3, lr} lcd_3410.asm:164 8000220: 4b16 ldr r3, [pc, #88] ; (800027c <lcd_spi_cblock.dma_base>) lcd_3410.asm:168 8000222: 4a13 ldr r2, [pc, #76] ; (8000270 <lcd_spi_cblock.spi_base>) lcd_3410.asm:169 8000224: 2101 movs r1, #1 8000226: 0249 lsls r1, r1, #9 lcd_3410.asm:175 8000228: 6818 ldr r0, [r3, #0] lcd_3410.asm:176 800022a: 4208 tst r0, r1 lcd_3410.asm:177 800022c: d0fc beq.n 8000228 <spi_tx_start+0xa> lcd_3410.asm:179 800022e: 4308 orrs r0, r1 lcd_3410.asm:180 8000230: 6018 str r0, [r3, #0] 8000232: 2101 movs r1, #1 8000234: 01c9 lsls r1, r1, #7 lcd_3410.asm:184 8000236: 8910 ldrh r0, [r2, #8] lcd_3410.asm:185 8000238: 4208 tst r0, r1 lcd_3410.asm:186 800023a: d1fc bne.n 8000236 <spi_tx_start+0x18> lcd_3410.asm:188 800023c: 4b10 ldr r3, [pc, #64] ; (8000280 <lcd_spi_cblock.dma1_ch3>) lcd_3410.asm:193 800023e: 2101 movs r1, #1 lcd_3410.asm:194 8000240: 6818 ldr r0, [r3, #0] lcd_3410.asm:195 8000242: 4388 bics r0, r1 lcd_3410.asm:196 8000244: 6018 str r0, [r3, #0] lcd_3410.asm:198 8000246: 4910 ldr r1, [pc, #64] ; (8000288 <lcd_spi_cblock.dma_src>) lcd_3410.asm:199 8000248: 60d9 str r1, [r3, #12] lcd_3410.asm:201 800024a: 4810 ldr r0, [pc, #64] ; (800028c <lcd_spi_cblock.dma_cnt>) lcd_3410.asm:202 800024c: 6058 str r0, [r3, #4] lcd_3410.asm:204 800024e: 2101 movs r1, #1 lcd_3410.asm:205 8000250: 6818 ldr r0, [r3, #0] lcd_3410.asm:206 8000252: 4308 orrs r0, r1 lcd_3410.asm:207 8000254: 6018 str r0, [r3, #0] lcd_3410.asm:209 8000256: bd0f pop {r0, r1, r2, r3, pc} 08000258 <lcd_spi_cblock>: lcd_spi_cblock(): lcd_3410.asm:213 8000258: 1000 asrs r0, r0, #32 800025a: 4002 ands r2, r0 0800025c <lcd_spi_cblock.gpioa_base>: lcd_3410.asm:214 800025c: 0000 movs r0, r0 800025e: 4800 ldr r0, [pc, #0] ; (8000260 <lcd_spi_cblock.gmask_1>) 08000260 <lcd_spi_cblock.gmask_1>: lcd_3410.asm:216 8000260: 9800 ldr r0, [sp, #0] 8000262: 0000 movs r0, r0 08000264 <lcd_spi_cblock.gmask_2>: lcd_3410.asm:217 8000264: fc00 0000 stc2 0, cr0, [r0], {-0} 08000268 <lcd_spi_cblock.gmask_3>: lcd_3410.asm:218 8000268: fc00 0000 stc2 0, cr0, [r0], {-0} 0800026c <lcd_spi_cblock.gmask_4>: lcd_3410.asm:219 800026c: 0000 movs r0, r0 800026e: f0f0 3000 ; <UNDEFINED> instruction: 0xf0f03000 08000270 <lcd_spi_cblock.spi_base>: lcd_3410.asm:221 8000270: 3000 adds r0, #0 8000272: 4001 ands r1, r0 08000274 <lcd_spi_cblock.cr1_mask>: lcd_3410.asm:222 8000274: 0014 movs r4, r2 8000276: 0000 movs r0, r0 08000278 <lcd_spi_cblock.cr2_mask>: lcd_3410.asm:223 8000278: 0702 lsls r2, r0, #28 800027a: 0000 movs r0, r0 0800027c <lcd_spi_cblock.dma_base>: lcd_3410.asm:225 800027c: 0000 movs r0, r0 800027e: 4002 ands r2, r0 08000280 <lcd_spi_cblock.dma1_ch3>: lcd_3410.asm:226 8000280: 0030 movs r0, r6 8000282: 4002 ands r2, r0 08000284 <lcd_spi_cblock.dma_dest>: lcd_3410.asm:227 8000284: 300c adds r0, #12 8000286: 4001 ands r1, r0 08000288 <lcd_spi_cblock.dma_src>: lcd_3410.asm:228 8000288: 0000 movs r0, r0 800028a: 2000 movs r0, #0 0800028c <lcd_spi_cblock.dma_cnt>: lcd_3410.asm:229 800028c: 0360 lsls r0, r4, #13 800028e: 0000 movs r0, r0 08000290 <lcd_spi_cblock.dma_ccr>: lcd_3410.asm:230 8000290: 0090 lsls r0, r2, #2 8000292: 0000 movs r0, r0 08000294 <lcd_init>: $t(): lcd_3410.asm:315 8000294: b507 push {r0, r1, r2, lr} lcd_3410.asm:316 8000296: f7ff ff8d bl 80001b4 <lcd_spi_init> lcd_3410.asm:318 800029a: 4a0e ldr r2, [pc, #56] ; (80002d4 <lcd_cblock>) lcd_3410.asm:323 800029c: 2001 movs r0, #1 lcd_3410.asm:324 800029e: 0580 lsls r0, r0, #22 lcd_3410.asm:325 80002a0: 6190 str r0, [r2, #24] lcd_3410.asm:326 80002a2: 2021 movs r0, #33 ; 0x21 lcd_3410.asm:327 80002a4: f7ff ffb3 bl 800020e <spi_tx> lcd_3410.asm:328 80002a8: 2013 movs r0, #19 lcd_3410.asm:329 80002aa: f7ff ffb0 bl 800020e <spi_tx> lcd_3410.asm:330 80002ae: 20c8 movs r0, #200 ; 0xc8 lcd_3410.asm:331 80002b0: f7ff ffad bl 800020e <spi_tx> lcd_3410.asm:332 80002b4: 2022 movs r0, #34 ; 0x22 lcd_3410.asm:333 80002b6: f7ff ffaa bl 800020e <spi_tx> lcd_3410.asm:334 80002ba: 200c movs r0, #12 lcd_3410.asm:335 80002bc: f7ff ffa7 bl 800020e <spi_tx> lcd_3410.asm:336 80002c0: 2101 movs r1, #1 lcd_3410.asm:337 80002c2: 0189 lsls r1, r1, #6 lcd_3410.asm:338 80002c4: 6191 str r1, [r2, #24] lcd_3410.asm:340 80002c6: 4905 ldr r1, [pc, #20] ; (80002dc <lcd_cblock.buf_size>) lcd_3410.asm:341 80002c8: 2000 movs r0, #0 lcd_3410.asm:343 80002ca: f7ff ffa0 bl 800020e <spi_tx> lcd_3410.asm:344 80002ce: 3901 subs r1, #1 lcd_3410.asm:345 80002d0: d1fb bne.n 80002ca <lcd_init+0x36> lcd_3410.asm:346 80002d2: bd07 pop {r0, r1, r2, pc} 080002d4 <lcd_cblock>: lcd_cblock(): lcd_3410.asm:735 80002d4: 0000 movs r0, r0 80002d6: 4800 ldr r0, [pc, #0] ; (80002d8 <lcd_cblock.lpbuf>) 080002d8 <lcd_cblock.lpbuf>: lcd_3410.asm:737 80002d8: 0000 movs r0, r0 80002da: 2000 movs r0, #0 080002dc <lcd_cblock.buf_size>: lcd_3410.asm:738 80002dc: 0360 lsls r0, r4, #13 80002de: 0000 movs r0, r0 080002e0 <main>: $t(): dso_micro.asm:25 80002e0: f7ff ff1c bl 800011c <rcc_config> dso_micro.asm:26 80002e4: f7ff ffd6 bl 8000294 <lcd_init> dso_micro.asm:30 80002e8: e7fe b.n 80002e8 <main+0x8> |
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05 Oct 2015, 06:24 |
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Andrew Martin 05 Oct 2015, 10:06
Some problem with line numbers.
ldbit macro transforms to movs/lsls Line number 14 is absent in line number info. May be same problem with other macroinstructions. Source Code: 8: rcc_config: ;Configure HSE 9: ldr r3,[.rcc_base] 10: virtual at r3 11: .rcc RCC_TypeDef 12: end virtual 13: ldr r0,[.rcc.CR] ;enable HSE oscillator 14: ldbit r1,RCC_CR_HSEON 15: orrs r0,r1 Disassembly: Code: 0800011c <rcc_config>: $t(): config.asm:9 800011c: 4b21 ldr r3, [pc, #132] ; (80001a4 <rcc_config.rcc_base>) config.asm:13 800011e: 6818 ldr r0, [r3, #0] 8000120: 2101 movs r1, #1 8000122: 0409 lsls r1, r1, #16 config.asm:15 8000124: 4308 orrs r0, r1 |
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05 Oct 2015, 10:06 |
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revolution 05 Oct 2015, 10:13
Version 1.36 now available:
Quote: v1.36 2015-Oct-05 |
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05 Oct 2015, 10:13 |
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Andrew Martin 05 Oct 2015, 10:35
revolution wrote: Version 1.36 now available: Unfortunately in this version the bug with macros and line numbers is present too. There is no line number info for lines with macro invokation. |
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05 Oct 2015, 10:35 |
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revolution 05 Oct 2015, 10:39
Okay. I didn't see your last message about the macro problem when I posted v1.36. I will look into that. However that must be a old bug from many versions ago
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05 Oct 2015, 10:39 |
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revolution 07 Oct 2015, 03:10
On macros and line numbers
Consider the following macros and the debug display: The first one is easy. Code: macro m1 { mov eax, ebx } m1 ;debug output mov eax, ebx ;source line: "mov eax, ebx" The second one is a bit more abstract. Code: macro m2 source, dest { mov dest, source } m2 ebx, eax ;debug output mov eax, ebx ;source line: "mov dest, source" The third one could be anything. Code: macro m3 param { mov param } m3 <eax,ebx> ;debug output mov eax, ebx ;source line: "mov param" The fourth one is completely devoid of context. Code: macro m4 instr { instr } m4 <mov eax, ebx> ;debug output mov eax, ebx ;source line: "instr" And it gets worse. Code: macro m5 [instr] { forward instr } m5 <mov eax, ebx>, <nop>, <int3> ;debug output mov eax, ebx ;source line: "forward instr" nop ;source line: "forward instr" int3 ;source line: "forward instr" Does anyone have some suggestions on how to make this actually sensible? |
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07 Oct 2015, 03:10 |
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Andrew Martin 07 Oct 2015, 10:48
Does the type of macro matter?
listing.exe represents the macro invokation as one long instruction regardless of complication of macro. Only a line number with macro invokation must be present in debug info, and only if this macro is presented in an output executable code - it is enough. Code: 000000C2: 42 69 ldr r2,[.rcc.AHBENR] 000000C4: 01 21 49 04 ldbit r1,RCC_AHBENR_GPIOAEN 000000C8: 0A 43 orrs r2,r1 |
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07 Oct 2015, 10:48 |
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