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> Non-x86 architectures > FASMARM v1.44 - Cross assembler for ARM CPUs Goto page Previous 1, 2, 3 ... 23, 24, 25 ... 31, 32, 33 Next |
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revolution 16 Sep 2013, 01:49
Beta release docs for the upcoming v8 architecture.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0487a/index.html I do plan to update fasmarm for v8, but as there is no hardware available yet it might take a while. |
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16 Sep 2013, 01:49 |
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revolution 20 Dec 2013, 02:06
den_po wrote: fasmarm doesn't work correctly with long filenames |
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20 Dec 2013, 02:06 |
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farwayer 28 Jan 2014, 12:43
Hi revolution! Thx for great work! But I have some troubles with elf format and external C function. Can you explain is this a bug or am I doing something wrong?
Code: format elf thumb STACK_TOP = 0x20002000 macro vector handler { dw (handler + 1) } section ".text" dw STACK_TOP vector start ; reset start: bl main hang: b hang extrn main arm-none-eabi-readelf -a out/debug/vectors.o Code: Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS 00000000 000034 00000e 00 A 0 0 4 [ 2] .rel.text REL 00000000 000042 000008 08 3 1 4 [ 3] .symtab SYMTAB 00000000 00004a 000030 10 4 2 4 [ 4] .strtab STRTAB 00000000 00007a 000020 00 0 0 1 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings) I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific) There are no section groups in this file. There are no program headers in this file. Relocation section '.rel.text' at offset 0x42 contains 1 entries: Offset Info Type Sym.Value Sym. Name 00000004 00000101 R_ARM_PC24 00000000 .text There are no unwind sections in this file. Symbol table '.symtab' contains 3 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 SECTION LOCAL DEFAULT 1 .text 2: 00000000 0 NOTYPE GLOBAL DEFAULT UND main No version information found in this file. Relocation section '.rel.text' does not contain 'main' symbol. And then after linking 'bl main' jmp to wrong address Code: Disassembly of section .text: 00000000 <main-0x10>: 0: 2000 movs r0, #0 2: 2000 movs r0, #0 4: 0008 movs r0, r1 6: 0000 movs r0, r0 8: f7ff fffa bl 0 <main-0x10> c: e7fe b.n c <main-0x4> ... 00000010 <main>: 10: 2000 movs r0, #0 12: 4770 bx lr |
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28 Jan 2014, 12:43 |
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revolution 28 Jan 2014, 13:02
As shown in the ReadMe.txt file in the download:
ReadMe.txt wrote: Relocations for ELF and PE are not supported at this time. Although, one user has reported that relocations are working correctly with PE format, use at your own risk, I have not tested them yet. |
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28 Jan 2014, 13:02 |
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farwayer 28 Jan 2014, 13:27
revolution wrote: Relocations for ELF and PE are not supported at this time. Although, one user has reported that relocations are working correctly with PE format, use at your own risk, I have not tested them yet. Oh, look like I missed this. So, at the moment there is no way to mix fasm and C code? |
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28 Jan 2014, 13:27 |
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revolution 28 Jan 2014, 13:45
farwayer wrote: So, at the moment there is no way to mix fasm and C code? |
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28 Jan 2014, 13:45 |
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revolution 29 Jan 2014, 02:10
Version 1.31 now available:
Quote: v1.31 2014-Jan-29 |
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29 Jan 2014, 02:10 |
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aralf 04 Feb 2014, 15:36
Is there a way to force fasmarm to encode an instruction as thumb-2 32bit?
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04 Feb 2014, 15:36 |
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revolution 05 Feb 2014, 01:30
aralf wrote: Is there a way to force fasmarm to encode an instruction as thumb-2 32bit? Code: thumb b.w $ ;<--- wide (32-bit) instruction adds.w r0,r0,r1 ;<--- wide (32-bit) instruction b.n $ ;<--- narrow (16-bit) instruction or an error if it doesn't fit adds.n r0,r0,r1 ;<--- narrow (16-bit) instruction or an error if it doesn't fit b $ ;<--- auto sized, narrow is preferred, wide if necessary adds r0,r0,r1 ;<--- auto sized, narrow is preferred, wide if necessary Code: 00000000: F7FFBFFE 7M b 0x0 00000004: EB100001 7M adds r0,r0,r1 00000008: E7FE V4T b 0x8 0000000A: 1840 V4T adds r0,r0,r1 0000000C: E7FE V4T b 0xC 0000000E: 1840 V4T adds r0,r0,r1 |
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05 Feb 2014, 01:30 |
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aralf 11 Feb 2014, 13:58
thank you, works!
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11 Feb 2014, 13:58 |
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alorent 22 Mar 2014, 10:25
I have just downloaded FASMARM! It's a great project!
Is it possible for compile FASMARM as DLL using the "FASM as DLL" source code from Tomasz? I'm interested in compiling it as a DLL to generate some basic opcodes "on the fly". Thanks! |
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22 Mar 2014, 10:25 |
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revolution 22 Mar 2014, 14:36
alorent wrote: Is it possible for compile FASMARM as DLL using the "FASM as DLL" source code from Tomasz? |
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22 Mar 2014, 14:36 |
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uor99 06 Dec 2014, 00:42
revolution, how great your work is !
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06 Dec 2014, 00:42 |
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revolution 06 Dec 2014, 12:32
It still needs updating for the new 64-bit instruction set. But that will have to wait until next year at the earliest.
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06 Dec 2014, 12:32 |
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Matrix 06 Dec 2014, 19:53
revolution wrote:
I suggest these, in this order: A20-OLinuXino-MICRO-4GB_integrated_nand_flash A20-OLinuXino-MICRO Beaglebone Black raspberrypi |
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06 Dec 2014, 19:53 |
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revolution 21 Dec 2014, 09:42
Version 1.32 now available:
Quote: v1.32 2014-Dec-21
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21 Dec 2014, 09:42 |
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revolution 21 Dec 2014, 13:42
Matrix wrote:
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21 Dec 2014, 13:42 |
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revolution 22 Dec 2014, 04:31
revolution wrote: ... the lack of motivation on my part to deal with HLLs and fighting the compilers ... Why we humans are so dumb as to produce, and use, languages like that I might never know. [/rant] |
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22 Dec 2014, 04:31 |
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Picnic 16 Mar 2015, 12:16
revolution wrote:
Any plans for high-level control structures such as IF, WHILE, REPEAT, etc ? |
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16 Mar 2015, 12:16 |
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