Message board for the users of flat assembler.
> Compiler Internals > Missing instruction in FASM
revolution 01 Sep 2005, 09:41
My Cyrix manual states that the instruction mnemonic OIO (Official Invalid Opcode) is hex 0F FF. Indeed the opcode map shows that Intel and AMD have taken great lengths to avoid using this encoding for the otherwise natural progression to PADDQ.
Does FASM need to support OIO natively? Yes I know simply using "OIO equ db 0fh,0ffh" would do the job also. But just in the interest of completeness perhaps it should be added? Thoughts anyone?
|01 Sep 2005, 09:41||
MazeGen 01 Sep 2005, 12:01
IMHO, AFAIK Cyrix has vanished from the market and therefore its special opcodes should be ignored.
|01 Sep 2005, 12:01||
revolution 01 Sep 2005, 13:10
So have 086, 286, 386, 486, Pentium, P2, P3 "vanished from the market" but people still have them running code.
|01 Sep 2005, 13:10||
Tomasz Grysztar 01 Sep 2005, 15:37
Anyway, I have never supported any of the Cyrix-specifix extensions in fasm (and no NEC, too, etc.), only the Intel and AMD ones.
|01 Sep 2005, 15:37||
LocoDelAssembly 01 Sep 2005, 18:31
From Ralf Brown's interrupts list:
OPCODE OIO - Official Undefined Opcode
CPU: Cyrix Cx6x86 (same code on AMD Am5k86)
Logical Form: OIO
Caused #UD exception
Flags Affected: No Flags Affected
CPU Mode : RM,PM,VM,VME,SMM
RM PM V86 VME SMM
#UD #UD #UD #UD #UD Undefined Instruction
No more Exceptions
This instruction caused #UD. AMD guaranteed that in future AMD's
CPUs this instruction will caused #UD. Of course all previous CPUs
(186+) caused #UD on this opcode. This instruction used by software
writers for testing #UD exception servise routine.
Physical Form : UD
COP (Code of Operation) : 0Fh FFh
Clocks : UD
8088: Not supported
NEC V20: Not supported
Pentium Pro: ~int
Apparently AMD support it too.
|01 Sep 2005, 18:31||
Tomasz Grysztar 01 Sep 2005, 19:22
No more, in later AMD docs (the ones I based on) there's no mention of it. It was replaced by Intel's UD2 later, BTW.
|01 Sep 2005, 19:22||
El Tangas 01 Sep 2005, 19:48
Cyrix and Centaur were bought by Via, so they are not really dead...
Via CPU's however identify themselves with "CentaurHauls" and not "CyrixInstead" after cpuid.
Regarding the undocumented opcodes, NASM supports the following invalid instructions:
UD0 ; 0F FF
UD1 ; 0F B9
UD2 ; 0F 0B
I guess that's why the "official" invalid opcode is called UD2, there are 2 more...
And just because the opcode 0F FF has not be taken by a new instruction, doesn't mean it never will. The undocumented instructions "umov" (also supported by NASM) present in the 386 and 486 where taken up by simd instructions, I think.
|01 Sep 2005, 19:48||
Matrix 02 Sep 2005, 01:43
i dont think anyone is missing that instruction,
1 of 10^9 computers has that processor or less, this is something uncommon and not standard.
maeby you could equ nop instead on CyrixInstead
|02 Sep 2005, 01:43||
revolution 02 Sep 2005, 02:26
Where did you get that figure from? I strongly doubt that is accurate!
1 of 10^9 computers has that processor or less
The author has already stated the intention to support AMD and Intel only. That is completely fine with me. I was merely wondering if the author might like to include it in case it was an oversight.
|02 Sep 2005, 02:26||
MazeGen 02 Sep 2005, 14:45
El Tangas wrote:
I call this instruction "less documented", because it is mentioned in Intel Manuals too, but with no mnemonic. BTW, it takes modr/m byte additionally. My disassembler supports it.
|02 Sep 2005, 14:45||
< Last Thread | Next Thread >
Copyright © 1999-2023, Tomasz Grysztar. Also on GitHub, YouTube, Twitter.
Website powered by rwasa.