When I switch from real mode to protected mode, what happens to the old real mode addresses? Does 2000h in real mode become 20000000h in protected mode, or 00002000h? Also, what happens to the read-only areas (where BIOS is)? For example, does FFFF0h become FFFF0000h or 000FFFF0h in protected mode? I understand segmentation and everything in real mode, and how the GDT and everything works, but how do the Physical Addresses come out? Thanks.

Physical addresses are just that, physical addresses. Sure, you say, but what the heck does that mean. Well, it is easier if you think of the memory being access by the number of address lines the CPU uses to access it. In other words, in 16-bit memory, the most memory is 2^16, where the highest addressable memory address would be 2^16 - 1, with a 0 starting. This assume a linear understanding, without the use of segments. Now, 2^16 = 65,536 bytes, though it starts at 0, therefor the highest addressable is 65,535. This is linear, neglecting segments. Now, moving to 16MB of RAM, we have 2^24, or 24-bits of RAM. And just 1 MB is 2^20 or 20-bits. This is where real mode segmentation is used, since ffff:0010 = 1MB + 1 byte. The linear equivelent of this is segment x 16 + offset, thus ffff x 10h = ffff0 the add 10h = 100000h linear.

So, to answer your fist question: The address are still there, they are just considered linear, based on your selector of course, as long as it is zero based.

To answer you second question the address becomes 00002000h if the segment was 0000 and the offset was 2000 (0000:2000 = 0200:0000).

Third question, the areas used by BIOS are left alone, unless you overwrite them. For instance, I leave the IVT (0 - 3FFh linear) alone, so that I can use it later, I also don't over write the BDA (400 - 500h) unless I know I am updating specific areas that I know other programs will use for their operation, like the nubmer of text columns and rows, and for which pages, it also is a good idea if you intend to boot from DOS and exit back to DOS when you are finished.

Fourth question: 000FFFF0h this is linear and stays that way.

Fifth question, physical address are the addresses the CPU can address based on the number of address lines. In the case of a 32-bit machine, this is 2^32 or 4 GB or 0 to FFFFFFFFh.

Paging on the other hand is another animal...then you're talking about virtual memory. Bu tin physical memory it is just that.

The next question then is how do you determine what physical memory is installed? There are a number of ways to do this...but I'll answer that when you've actually asked it.

I knew most of that. I wasn't asking about linear addresses and segmentation in pm. I'm just wondering if physical address 20000h in rm becomes 00020000h, or 20000000h in pm. I got the answer I needed at the Mega-Tokyo OS dev forums: 00020000h. However, I still wonder what happens to the read-only memory areas like BIOS. Are they just an island of read-only memory between low and high memory areas, or do they (unlike all other addresses, which are apparently zero-extended) move all the way to the top, such as FFF00000h? I'm pretending there isn't any segmentation, it's just all physical addresses and nothing else.

address don´t change, i think that you are confused by the cpu initialization that starts execution on high memory address, but this is another problem, not related to the rm->pm transition.

Octavio is right, they don't change. There are several areas where ROMs are within the memory area. Using INT 15h AX=E820 you can get an initialization mapping when you enter your OS.

Physical addresses doesn't change. All depends on paging. If you have no paging, addresses stay same.

Well I'm not talking about linear addresses, or paging, or segmentation. Just the plain underlying physical addresses that are mapped to those logical and linear addresses. But I got my answer at the Mega-Tokyo forum- the rm addresses are zero-extended from 20 bits to 32 bits, so what in real mode is 20000h (or as a segment, 2000:0000h) becomes 00020000h in protected mode.

Physical addresses are the number of address lines, which is linear.

lol all these addresses making me confused!

What I mean is, the physical addresses (32-bit in pmode, 20-bit in real mode). Not segments (16-bit selector in pmode, or 16-bit segment * 16 + 16-bit offset in rmode), or pages (4 bits in rmode, ? in pmode).

Physical addresses are defined by phisycal wires, integrated sircuits, transistors, resistors, logical keys, etc. They do not depend on CPU's state. For example, see DMA working. It works with ph. addresses, and it doesn't care at all - is there CPU on main board, or it is not, does it work in PM or RM...
Hm... it is 0002000h BOTH in RM&PM.

No, in PM it is 00020000h, and in RM it is 20000h. The extra 3 zeroes are not there since rm is only 20-bit instead of 32-bit. They may be equal, but they are not the same.

Physical addresses are the addresses that you put as the base in a descriptor (assuming no paging is enabled). I'm trying to figure out what the base should be, for example if I create a segment for the screen buffer (0xB8000 in real mode) will it be 0xB8000000 or 0x000B8000 in pmode? I got my answer, it is 0x000B8000.

These extra 3 zeroes are the matter of enabling the A20 line, not the real or protected mode. You can have A20 enabled in real mode, or even disabled in protected.

forgot about that. I always forget, because I think of A20 as part of protected mode.

"No, in PM it is 00020000h, and in RM it is 20000h" Yeah, but i mean you can write in PM 20000h and it will be the same as 00020000H because zero=padding made automaticaly. In rm, if you use 32 bit mode, there IS 000 but you do not write them, right? but they exist.

To clear the things out:

Normally, after boot, the physical addresses are 20-bit, you have to enable A20 to use the 32-bit addresses.

In real mode you've got segmented addressing - the physical address is obtained by adding the offset to the segment number shifted right by four. Because the segment can be 16-bit, the result of shifting will fit in the 20 bits.
(Just to remind - 0040h:0017h and 0000h:0417h both correspond to the physical address 00417h)

However it is possible, that after adding the offset to physical address of segment, overflow will happen and the result won't fit in 20 bits. For example 0FFFFh:1000h = 0FFFF0h + 1000h = 100FF0h. When A20 is disabled, only 20 bits are used as address, so you will get 00FF0h address this way - the addresses just "wrap" in this case. But when you enable A20, and thus 32-bit physical addresses, you access this way almost 64 kilobytes above the 1MB - this fragment of memory above the 1 MB that can be accessed with 16-bit segmented addressing is called high memory area (HMA) and was often used in DOS to load some TSR programs without taking the conventional memory.

In protected mode you've got much more complicated addressing mechanisms. The segmented addresses consist of selector and offset, and selector points to the record in descriptor table. From the descriptor processor reads the 32-bit base address of segment and adds offset to it to obtain the linear address. When no paging is enabled, the linear address is exactly the physical address - but note that if you've got A20 line disabled, only the low 20 bits of it will be actually used for addressing. When paging is enabled, the linear address is split into page number and offset withing the page, and converted into the physical address through the paging mechanism - but that's another story...

Have just another question whose I'm to lazy to read in Intels docs: Are those interrupt, global and local descriptors actually cached in the CPU? I guess so, else this would require the CPU to always read from memory everytime you access memory (double access). Also is this descriptor caching resistent, I mean, can you actually load the GDTR with some value, CPU caches it and overwrite the actual descriptors in RAM without any harm? Or will the write access to the desciptor location force the CPU to flush its descriptor caches and recache them?

The descriptor is loaded into the hidden part of the segment register when you load a new selector into it. So you can overwrite the actual descriptors in memory if you don't plan to load any new selectors into segment registers.

PS. Flat real mode works this way: you load the selector with 4GB limit into segment registers, so the hidden descriptors become flat, and then you switch back to real mode - and the hidden descriptors remain with 4GB limit.

Thx. I remember now, it's been a while since I have written my own flat real mode mode loader.