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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 20625
Location: In your JS exploiting you and your system
revolution 07 May 2025, 11:27
That uses the code for ROL so the result is correct for ROL.
Post 07 May 2025, 11:27
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Roman



Joined: 21 Apr 2012
Posts: 1938
Roman 07 May 2025, 11:38
I want ror to.
ror(x,y)=[(x-(x mod (2^y))/(2^y)]+[[(x mod (2^y)]*(2^32-y)]

ror(x,y):
t1 = x >> y;
t2 = x << (bitsize - y );
ror = t1 | t2;
Post 07 May 2025, 11:38
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Roman



Joined: 21 Apr 2012
Posts: 1938
Roman 07 May 2025, 12:11
I do this variant for ror.
But its fixed for 6025 value
Code:
n = 12
      v = 6025
BIT_MASK = 0xFFFFFFFF ;0x7FFFFFFF
BIT_MASK2 = 0xffFFFFFF
__@v1 = ( BIT_MASK AND ( v shr (  1 + bsr BIT_MASK2 - n ))) OR ( BIT_MASK2 AND ( v shl n ))

mov edx,((__@v1) shl 4  +1)  and 0x0fffffff     

I get 0x7890001 but must be 0x78900001

Code:
n = 12
      v = 6025
BIT_MASK = 0xFFFFFFFF ;0x7FFFFFFF
BIT_MASK2 = 0xffFFFFFF
__@v1 = ( BIT_MASK AND ( v shr (  1 + bsr BIT_MASK2 - n ))) OR ( BIT_MASK2 AND ( v shl n ))
 __@v1 =(__@v1) shl 4
mov edx,((__@v1) shl 4  +1)  and BIT_MASK2 ;= 0x78900001 right !
    


Code:
;ror
n = 12
      v = 6025
BIT_MASK = 0xFFFFFFFF ;0x7FFFFFFF
BIT_MASK2 = 0xffFFFFFF
__@v1 = ( BIT_MASK AND ( v shr (  1 + bsr BIT_MASK2 - n ))) OR ( BIT_MASK2 AND ( v shl n ))
mov edx,__@v1
uuu = __@v1 and (0xff000000) shr 19
uuu = uuu shr 12
mov esi,uuu
 __@v1 =(__@v1) shl 4
mov edx,((__@v1) shl 4  +  (uuu))  and BIT_MASK2 ;= 0x78900001 right !    
Post 07 May 2025, 12:11
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Roman



Joined: 21 Apr 2012
Posts: 1938
Roman 07 May 2025, 15:30
I don't know right this solution or not. But result correct.
Code:
   n = 12
      v = 6025
BIT_MASK = 0xFFFFFFFF ;0x7FFFFFFF
BIT_MASK2 = 0xffFFFFFF
__@v1 = ( BIT_MASK AND ( v shr (  1 + bsr BIT_MASK2 - n ))) OR ( BIT_MASK2 AND ( v shl n ))
mov edx,__@v1
uuu = __@v1 and (0xff000000) shr 19
uuu = uuu shr 12
mov esi,uuu
 __@v1 =(__@v1) shl 4
mov edx,((__@v1) shl 4  +  (uuu))  and BIT_MASK2
__@v1 = ((__@v1) shl 4  +  (uuu))  and BIT_MASK2  + 126 + 12;+ __@v1

;rol
n = 23-14
__@reslt = ( BIT_MASK AND ( __@v1 shl ( 1 + bsr BIT_MASK - (n) ))) OR ( BIT_MASK AND ( __@v1 shr (n) ))
mov edx,(__@reslt shl 0 ) AND BIT_MASK2;+ 126 + 12 ;+ jjjj
PrintVal 'rol =',__@reslt ;get  0x0x45bc4800 = float 6025.0
      @FltMul  0x3c23d70a,__@reslt,ebx ;0.01*6025.0=float 60.25
      PrintVal 'float =',ebx          ;I get 0x42710000 = float 60.25
    


Last edited by Roman on 07 May 2025, 15:50; edited 1 time in total
Post 07 May 2025, 15:30
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Roman



Joined: 21 Apr 2012
Posts: 1938
Roman 07 May 2025, 15:45
Fasmw 1.73 must have ror,rol for using in macros.
Post 07 May 2025, 15:45
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Roman



Joined: 21 Apr 2012
Posts: 1938
Roman 08 May 2025, 14:54
mrol = rol edx,8
Code:
macro mrol v { 
         v1 = (v shl 8) and 0xffffffff
         v2 = (v shr 24)
         v3 = (v1 or v2) and 0xffffffff
         mov edx,v3
}

      mrol 0x10203040       ;=20304010
      mrol v3               ;=30401020
      mrol v3               ;=40102030
      mrol v3               ;=10203040

macro mrol1 v {  
         v1 = (v shl 1) and 0xffffffff
         v2 = (v shr 24) and 0xffffff0f
         v3 = (v1 or v2) 
         mov edx,v3
}
mrol1 0x10203040 
rept 7 {mrol1 v3} ;ok 0x20304010
rept 8  {  mrol1 v3 } ;incorrect result 0x30401018 must be 0x30401020
    
Post 08 May 2025, 14:54
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Roman



Joined: 21 Apr 2012
Posts: 1938
Roman 08 May 2025, 17:23
Code:
;work fine
macro mror v {  
         t = v and 1
         x = v shr 1
         x = x or (t shl 31)

         mov edx,x
}
;mrol work fine to 
macro mroll v { 
         t = v and (1 shl 31)
         x = v shl 1
         x = x or (t shr 31)  and 0xffffffff

         mov edx,x
}    
    
Post 08 May 2025, 17:23
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