Index
> Main > jcxz and JECXZ error |
| Author |
|
|
Roman 08 Jan 2021, 19:53
I try compile in 64 bits jcxz and JECXZ and get error
illegal instruction. Op code E3h |
|||
08 Jan 2021, 19:53 |
|
|
Ali.Z 08 Jan 2021, 22:04
jcxz cannot be encoded in long-mode.
the default is jrcxz in long-mode. jecxz is supported by using address size prefix. _________________ Asm For Wise Humans |
|||
|
08 Jan 2021, 22:04 |
|
|
Roman 09 Jan 2021, 10:14
Funny but asm op. code the same.
A mean jrcxz and jecxz have op. code 0E3h |
|||
|
09 Jan 2021, 10:14 |
|
|
revolution 09 Jan 2021, 10:20
In 64-bit there is no jcxz, The binary code it used for jecxz instead. This is known as a "promoted" instruction, because the base case is jrcxz.
The is the same for pop and push. The same binary code is used for 64-bits push/pop as that used for 32-bit mode. Meaning there is no 32-bit push/pop at all in 64-bit mode. |
|||
|
09 Jan 2021, 10:20 |
|
|
Furs 09 Jan 2021, 14:04
Yeah, but jcxz is 16-bit, not 32-bit, so it's not the same as push/pop situation.
|
|||
|
09 Jan 2021, 14:04 |
|
|
revolution 09 Jan 2021, 14:10
Yes, you are correct. I could have made that clearer.
|
|||
|
09 Jan 2021, 14:10 |
|
|
Tomasz Grysztar 09 Jan 2021, 14:54
This all traces back to how 386 used special prefix rules for LOOP/JCXZ family of instructions. The choice of CX or ECX was controlled (unusually) by 67h prefix, while 66h prefix controlled the size of target address computation. You can easily test all the combinations:
Code: format PE at 400000h jecxz dword 401000h ; E3 jecxz word 1000h ; 66 E3 jcxz dword 401000h ; 67 E3 jcxz word 1000h ; 66 67 E3 In long mode the 67h prefix was kept, this time choosing between RCX and ECX, while 66h was discontinued, as obviously it would be quite useless. |
|||
|
09 Jan 2021, 14:54 |
|
|
l4m2 19 Jan 2021, 02:18
So db 4x has totally no effect on E3, right?
|
|||
|
19 Jan 2021, 02:18 |
|
|
Ali.Z 19 Jan 2021, 12:30
no, because *CX register is used implicitly.
_________________ Asm For Wise Humans |
|||
|
19 Jan 2021, 12:30 |
|
|
uu 14 Sep 2024, 08:12
Just now I tested jcxnz (Jump if CX/ECX not zero), and FASM said illegal instruction.
I check online, really no jcxnz, only got jcxz. |
|||
|
14 Sep 2024, 08:12 |
|
|
macomics 14 Sep 2024, 10:11
Code: use16 inc cx loop labelname ; dec cx & jcxnz labelname labelname: |
|||
|
14 Sep 2024, 10:11 |
|
|
uu 14 Sep 2024, 10:34
macomics wrote:
Very creative! Thumbs up. |
|||
|
14 Sep 2024, 10:34 |
|
|
revolution 14 Sep 2024, 11:10
uu wrote: Just now I tested jcxnz (Jump if CX/ECX not zero), and FASM said illegal instruction. MUL DIV LODS etc. It was all done with the desire to save those precious expensive bytes for other uses. One even weirder, seemingly contradictory, case is AAM/AAD with needing an extra byte for the base. There was no room in the microcode to encode the value of 10, so it was left up to the assembler to provide the constant. |
|||
|
14 Sep 2024, 11:10 |
|
|
macomics 14 Sep 2024, 17:17
Code: use16 inc cx ; cx = 0xFFFF + 1 = 0 -> nojmp (CF) ; cx = 0x0000 + 1 = 1 -> nojmp (CXz) ; cx = 0x0001 + 1 = 2 -> jmp (nCF & nCXz) loopnz labelname ; dec cx & jcxnz_and_nc labelname labelname: however Code: use16 inc cx ; cx = 0xFFFF + 1 = 0 -> jmp (CF) ; cx = 0x0000 + 1 = 1 -> nojmp (CXz) ; cx = 0x0001 + 1 = 2 -> nojmp (nCF) loopz labelname ; dec cx & jecxnz_and_cf labelname labelname: |
|||
|
14 Sep 2024, 17:17 |
|
< Last Thread | Next Thread > |
Forum Rules:
|