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thetrick



Joined: 19 Feb 2020
Posts: 18
thetrick 01 Feb 2024, 10:24
Hi guys. I have troubles with assembling when fasm tries to optimize the instruction size (Code can't be generated). So i used explicit instruction size specifier. This works god with JMP/JXX instructions but i have troubles with x64 arithmetic instructions (operand sizes do not match):

Code:
format PE64 console

sub rax, dword 248               


How to force to use specified operand size here?

Thank in advance!
Post 01 Feb 2024, 10:24
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Overclick



Joined: 11 Jul 2020
Posts: 658
Location: Ukraine
Overclick 01 Feb 2024, 10:54
If your variable can be larger than the dword, use a mask instead of the size:
Code:
sub rax, <operand> and 0xFFFFFFFF
    

Otherway you don't even need to mark it anyhow
Post 01 Feb 2024, 10:54
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Tomasz Grysztar



Joined: 16 Jun 2003
Posts: 8344
Location: Kraków, Poland
Tomasz Grysztar 01 Feb 2024, 10:54
As fasm's syntax focuses on the actual operation of the instruction and not on the encoding, the size prefixes are expected to match the actual sizes of the operands. You could forcefully disable the optimization by using a non-optimizable value and then rewriting it afterwards:
Code:
sub rax,07FFFFFFFh
store dword 248 at $-4    

With fasm2 it can be achieved directly:
Code:
{imm32} sub rax,248    
The new syntax I designed there reflects my hope of separating the instruction operation layer and instruction encoding layer into clearly separated areas.
Post 01 Feb 2024, 10:54
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thetrick



Joined: 19 Feb 2020
Posts: 18
thetrick 01 Feb 2024, 11:09
Thank you guys! I love fasm because it contains FASMW editor.

@Overclick i can't use your approach because i have the labels calculations so fasm can't resolve it because if the operand size occupies 1 byte the labels expression contains one number if it occupies 4 bytes it contains another.

@Tomasz Grysztar, can i adapt FASMW to fasm2? I like the second syntax.


Last edited by thetrick on 01 Feb 2024, 11:09; edited 1 time in total
Post 01 Feb 2024, 11:09
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution 01 Feb 2024, 11:09
248 is larger than 127 so it always encodes as a dword.
Code:
sub rax,248 ; always uses dword encoding    
Post 01 Feb 2024, 11:09
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thetrick



Joined: 19 Feb 2020
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thetrick 01 Feb 2024, 11:12
@revolution the actual value is calculated in assembly stage so it can have any value which is suitable as for 1 byte operand as for 4 bytes. FASM can't generate code because it can't resolve the sizes. This is the reason i need to use only specified size of operand encoding.
Post 01 Feb 2024, 11:12
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution 01 Feb 2024, 11:16
If you use the PE format then all relocatable addresses use qword encoding. Are you sure you end up with byte encodings?

Normally RIP-relative addresses are more efficient.
Post 01 Feb 2024, 11:16
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thetrick



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thetrick 01 Feb 2024, 11:20
My code operates the relative labels offsets not absolute.
Post 01 Feb 2024, 11:20
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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Location: In your JS exploiting you and your system
revolution 01 Feb 2024, 11:23
thetrick wrote:
My code operates the relative labels offsets not absolute.
That is what RIP-relative does. fasm uses it by default. No special tricks needed.
Post 01 Feb 2024, 11:23
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thetrick



Joined: 19 Feb 2020
Posts: 18
thetrick 01 Feb 2024, 11:31
Yes you're right but this isn't suitable for my purpose.
Post 01 Feb 2024, 11:31
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Overclick



Joined: 11 Jul 2020
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Overclick 01 Feb 2024, 12:18
Hmm


Description:
Filesize: 18.75 KB
Viewed: 1309 Time(s)

Capture.PNG


Post 01 Feb 2024, 12:18
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thetrick



Joined: 19 Feb 2020
Posts: 18
thetrick 01 Feb 2024, 13:10
Quote:

Hmm


When i uncomment Tomasz' approach it works good.


Description:
Filesize: 9.45 KB
Viewed: 1300 Time(s)

crc.png


Post 01 Feb 2024, 13:10
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thetrick



Joined: 19 Feb 2020
Posts: 18
thetrick 01 Feb 2024, 13:19
revolution wrote:
thetrick wrote:
My code operates the relative labels offsets not absolute.
That is what RIP-relative does. fasm uses it by default. No special tricks needed.

Thank you for suggestion. I see LEA also uses RIP for displacement too it's suitable for me! So i can use lea RAX, [label] without adding relocation information to binary. Jut the same instruction in x86 add the relocation information so i cannot to calculate valid code-crc after code loaded from non-base address. Thank you!
Post 01 Feb 2024, 13:19
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revolution
When all else fails, read the source


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revolution 01 Feb 2024, 13:57
If you use RIP-relative addressing then you don't need any relocation information, and the binary doesn't change when it is loaded to another address.

I can't help but think you are over-thinking something, when a normal RIP-relative binary wouldn't change any CRC, and wouldn't need any manual address computations, the CPU does it all automatically at runtime.
Post 01 Feb 2024, 13:57
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Overclick



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Overclick 01 Feb 2024, 14:54
Maybe you just need an org directive?..
Post 01 Feb 2024, 14:54
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thetrick



Joined: 19 Feb 2020
Posts: 18
thetrick 01 Feb 2024, 20:12
revolution wrote:
If you use RIP-relative addressing then you don't need any relocation information, and the binary doesn't change when it is loaded to another address.

I can't help but think you are over-thinking something, when a normal RIP-relative binary wouldn't change any CRC, and wouldn't need any manual address computations, the CPU does it all automatically at runtime.

Yes i used your suggestion and LEA instruction (which always 4 byte operand encoding).
Post 01 Feb 2024, 20:12
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