How do VEX share opcode?

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l4m2

Joined: 15 Jan 2015
Posts: 674

l4m2 05 May 2023, 17:25

https://en.wikipedia.org/wiki/VEX_prefix provides some info about mapping

Quote:

The values 1, 2 and 3 are equivalent to opcode prefixes 0x0F, 0x0F 0x38 and 0x0F 0x3A; p encodes additional prefix bytes. The values 0, 1, 2, and 3 correspond to implied no, 0x66, 0xF3, and 0xF2 prefixes.

But trying to map results in

Code:

0:  c4 62 b2 f6 16          (bad)
5:  f3 0f 38 f6 16          adox   edx,DWORD PTR [rsi]
a:  c4 62 b3 f6 16          mulx   r10,r9,QWORD PTR [rsi]
f:  f2 0f 38 f6 16          (bad)

Or say what instructions have both version and what don't?

05 May 2023, 17:25

Tomasz Grysztar

Joined: 16 Jun 2003
Posts: 8356
Location: Kraków, Poland

Tomasz Grysztar 05 May 2023, 17:41

The VEX/EVEX encodings are defined as separate instructions (as stressed by adding "V" in front of mnemonic for vector instructions, etc.), so there are no hard rules for correspondence between plain opcode and its VEX-encoded variant. There are many small discrepancies and exceptions, and I recommend looking up the instructions individually in Intel manuals to see what variants they have.

05 May 2023, 17:41

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