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Index > Non-x86 architectures > how to realize CPU adresses words not bytes

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ProMiNick



Joined: 24 Mar 2012
Posts: 806
Location: Russian Federation, Sochi
ProMiNick 02 Jun 2022, 08:12
hello.
lets suppose that for custom CPU memory addressed not by bytes but by words - how to make proper labeling (all instructions are word sized, all data are words or word sequences).
of corse we could walkaround of that & encode all instructions with address operand divided by 2.
but how to make that at least org, virtual, $, $$ will operate on memory addressed by words not bytes?
for example something like this
Code:
address :       encoded as              mnemonic
00000000:                               org 0
00000000:       03 03                   jmp hello
00000001:       03 65                   jmp hello2-2
00000002:       03 08                   jmp hello+5
00000003:                               hello:
00000004:                               org $30
00000030:       03 20                   jmp $20
00000031:                               virtual at $+51
00000064:       ?? ?? ?? ?? ?? ??       rw n
00000067:                               hello2:
00000067:                               end virtual
00000031:                               n=($-$$)*3    

there 2 solutions come in my mind:
1) initialy place source in virtual block & for each stored block produce 1 byte in that virtual per 1 word stored in output, and "end virtual" should close only nested virtual blocks not global one
2) override symbols org, virtual, $, $$ - no idea how.

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Post 02 Jun 2022, 08:12
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bitRAKE



Joined: 21 Jul 2003
Posts: 4081
Location: vpcmpistri
bitRAKE 02 Jun 2022, 09:20
I'm still thinking about the overall problem, but #2 can be realized in fasmg with the namespace separation mechanism. Here is another example, and this one.

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Post 02 Jun 2022, 09:20
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bitRAKE



Joined: 21 Jul 2003
Posts: 4081
Location: vpcmpistri
bitRAKE 02 Jun 2022, 09:31
Maybe preventing any odd byte output is another solution? In fasmg there are a limited number of data directives at the bottom of the hierarchy - they could be overloaded with a calminstruction which limits output. Similar to how relocations are accumulated and alignments are verified.

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¯\(°_o)/¯ “languages are not safe - uses can be” Bjarne Stroustrup
Post 02 Jun 2022, 09:31
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Tomasz Grysztar



Joined: 16 Jun 2003
Posts: 8359
Location: Kraków, Poland
Tomasz Grysztar 02 Jun 2022, 10:22
The AVR.INC in the classic examples for fasmg does this by overriding label definition with "(label) ?" macro definition:
Code:
calminstruction (label) ? definition&
        local command
        match : command?, definition
        jno other
        match :: command?, definition
        jyes other
        arrange definition, =LABEL label =AT =$ =shr 1
        assemble definition
        assemble command
        exit
    other:
        arrange definition, label definition
        assemble definition
end calminstruction    
See also the chapter called "How are the labels processed?" in fasmg.txt.

The AVR.INC also defines PC symbol to be equal to ($ shr 1), to be used in expressions where you need current address. In another of my early examples, one for DCPU-16 I override the $ symbol itself:
Code:
; The following statement defines case-sensitive "$", while the internal "$"
; is case-insensitive (like all built-in symbols). Because such name has only
; one case, this definition effectively replaces the internal symbol unless
; the "$?" construction is used to directly access the case-insensitive one.

$ equ ($? shr 1)    
The DCPU-16 example was a conversion of macros originally made for fasm 1, which became mostly irrelevant and is not distributed in fasmg packages. With fasm 1 it is not possible to override standard label syntax and LABEL macro had to be used instead.
Post 02 Jun 2022, 10:22
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