flat assembler
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> Programming Language Design > Why when mul al is ah? |
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revolution 24 Jul 2024, 23:12
The "middle" bits are not the register, they encode the instruction.
;... 011 = neg <-- 0xf6 0xd8 + reg 100 = mul <-- 0xf6 0xe0 + reg 101 = imul 110 = div 111 = idiv |
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24 Jul 2024, 23:12 |
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xverizex 24 Jul 2024, 23:15
revolution wrote: The "middle" bits are not the register, they encode the instruction. Oh thanks. I don't find this information in documentation i386. Maybe I miss one. Can you take mind where this is described? |
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24 Jul 2024, 23:15 |
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xverizex 24 Jul 2024, 23:36
revolution wrote: The "middle" bits are not the register, they encode the instruction. I figured out. I attached screenshot. F6 /4 . /4 is a 100 bit. Thanks. Now, I figured out.
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24 Jul 2024, 23:36 |
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