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Index > Programming Language Design > Why when mul al is ah?

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xverizex



Joined: 24 Jul 2024
Posts: 3
Location: Russia
xverizex 24 Jul 2024, 22:05
I'm writing emulation of i386. I encounter with the problem. R/M byte of mul operation is not fit logically.
Code:
            0000:0000      31c0           xor ax, ax
            0000:0002      31c9           xor cx, cx
            0000:0004      0480           add al, 0x80
            0000:0006      80c104         add cl, 4
            0000:0009      f6e1           mul cl
            0000:000b      c3             ret
    

As you can see, in operation mul cl it bytes f6 e1.
f6 is mul byte operation.
e1 - 1110 0001
e1 is - mod 11 is the registers. 100 is ah, 001 is cl. Why mul operation al cl looks like mul operation ah cl?
Post 24 Jul 2024, 22:05
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 20430
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revolution 24 Jul 2024, 23:12
The "middle" bits are not the register, they encode the instruction.

;...
011 = neg <-- 0xf6 0xd8 + reg
100 = mul <-- 0xf6 0xe0 + reg
101 = imul
110 = div
111 = idiv
Post 24 Jul 2024, 23:12
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xverizex



Joined: 24 Jul 2024
Posts: 3
Location: Russia
xverizex 24 Jul 2024, 23:15
revolution wrote:
The "middle" bits are not the register, they encode the instruction.

;...
011 = neg <-- 0xf6 0xd8 + reg
100 = mul <-- 0xf6 0xe0 + reg
101 = imul
110 = div
111 = idiv


Oh thanks. I don't find this information in documentation i386. Maybe I miss one. Can you take mind where this is described?
Post 24 Jul 2024, 23:15
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xverizex



Joined: 24 Jul 2024
Posts: 3
Location: Russia
xverizex 24 Jul 2024, 23:36
revolution wrote:
The "middle" bits are not the register, they encode the instruction.

;...
011 = neg <-- 0xf6 0xd8 + reg
100 = mul <-- 0xf6 0xe0 + reg
101 = imul
110 = div
111 = idiv


I figured out.
I attached screenshot. F6 /4 . /4 is a 100 bit. Thanks. Now, I figured out.


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Screenshot from 2024-07-25 04-34-39.png


Post 24 Jul 2024, 23:36
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