flat assembler
Message board for the users of flat assembler.
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Tomasz Grysztar
In the long mode fasm automatically generates RIP-based addressing by default, unless you enforce use of absolute addressing (see section 2.1.19 of the manual). Therefore the instruction that gets generated by
Code: mov al, [42] Code: mov al, [rip+36] Code: use64 org 100h mov al, [42] Code: use64 mov al, [rip-220] PS. The r/m field value 101b in the long mode does not have the same meaning as in the legacy mode. |
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gtasm
Of course, I took it for granted that the address was an absolute one!
I have to dig and learn more about this new (for me) RIP-relative addressing. Thank you very much for your precise, structured and very quick answer, Tomasz! Tom |
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gtasm
Ah, if I may, I notice that
Code: mov eax, [42] is not encoding using RIP-relative addressing, even if it is shorter than the SIB-based addressing. But there may be a technical reason for that (maybe a shorter latency with this kind of encoding of the instruction)... Tom |
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revolution
Instruction latency and throughput is not a consideration inside fasm. Each CPU and code stream is different so there isn't really a way for the assembler to know.
For your code above, which I assume is using 32 bit mode, there is no EIP addressing mode. RIP addressing is only possible in 64 bit mode. |
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gtasm
Thank you revolution,
It is valuable to know that latency has no impact on FASM output. I share your point of view. Please forgive me for two mistakes I made: - not giving the context of my code (prefixed by use64, as previously) - confusing the output of FASM and the one of NASM that I used to double check my results. Using FASM, the output of: Code: use64 mov eax, [42] is the shortest possible, RIP-relative addressing based: Code: 8B 05 24 00 00 00 Only NASM outputs the longer SIB and absolute addressing based output. Sorry for the confusion, and again, thank you both very much for the responsiveness and the quality of your answers. Tom |
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