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Ali.Z



Joined: 08 Jan 2018
Posts: 732
Ali.Z 22 Dec 2018, 10:51
fasm1:

missing UD0 UD1, but it have UD2.
according to intel's manual ud0 and ud1 were mentioned as well as their opcodes.

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Post 22 Dec 2018, 10:51
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Tomasz Grysztar



Joined: 16 Jun 2003
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Tomasz Grysztar 22 Dec 2018, 12:46
Post 22 Dec 2018, 12:46
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Ali.Z



Joined: 08 Jan 2018
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Ali.Z 22 Dec 2018, 13:30
thanks for the info.

i noticed fasm have some undocumented instructions as well, is UMOV really replaced?

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Tomasz Grysztar



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Tomasz Grysztar 04 Jan 2019, 17:21
As mentioned in the thread I linked, I had not been implementing instructions of third parties (non-Intel) other than AMD into fasm.

Also, currently available macro sets for fasmg include only Intel instruction sets (not even AMD-specific ones like 3DNow! or XOP). However, they include some undocumented instructions not implemented in fasm, like XBTS/IBTS in 80386.INC. The difference between instructions like XBTS/IBTS and ones like SALC is that the former were available only on 80386, while SALC continues to be supported by later CPUs, including modern ones. With fasmg you can select a later core using a header like P5.INC and then XBTS/IBTS become unavailable.

Nonetheless, with all instruction sets for fasmg being implemented simply in form of macros, it should be relatively easy for anyone to write additional ones for instruction specific to x86 variations from other vendors. You may find implementation of SCALL instruction of C&T Super386 CPU as a demonstration.

This is also something I might discuss in one of my streams - perhaps I could implement an few instruction encoders live.
Post 04 Jan 2019, 17:21
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Ali.Z



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Ali.Z 04 Jan 2019, 22:42
its always good it include undocumented instructions for specific intel models, just for completeness sake.

true i did not use fasmg (didnt even bother downloading it) but i dislike the idea of including specific files for specific instruction set.

its always good to let the flat assembler to check whatever instruction you are using and assembles it without bothering yourself with inc files.

going off topic little bit:
arent macros slower to process? during assembling and encoding stage.

or they are just faster than dumping all instructions in one file, like tables.inc from fasm1.

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Post 04 Jan 2019, 22:42
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Tomasz Grysztar



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Tomasz Grysztar 04 Jan 2019, 23:06
Ali.A wrote:
going off topic little bit:
arent macros slower to process? during assembling and encoding stage.

or they are just faster than dumping all instructions in one file, like tables.inc from fasm1.
Please read the first section of Introduction to fasmg to get a general idea. In short: yes, they are slower.
Post 04 Jan 2019, 23:06
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ProMiNick



Joined: 24 Mar 2012
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ProMiNick 05 Jan 2019, 00:04
in continue to offtopic:
processing of all instruction is in ASSEMBLE.INC (X86_64.INC and AVX.INC too).not in tables.inc.
tables.inc holds only pointers for processing handlers.

of course macroprocessing is slower than built in processing, because built in processing operates on in memory binary structures, but macros emulate such process operating only on text representation of such structures.

Dumping all instructions in one file isn`t enought. Coder should know not only specifics of current architecture but internal structure of flatassembler itself. Look at revolution work - there not only table of ARM instruction set, but much much work over it (from processing excluded sizing operators, prefixes, segmentation ... added to proccessing masked execution suffixes to instructions, instruction optimization there varied from cpu model(instruction set allowed) and so on ...),

In case of fasmg coder not needed to know fasmg internal architecture and able to realize any instruction set via macros. And it is not faster (but it is much simpler to end programer realize new architecture).
Post 05 Jan 2019, 00:04
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