jcc instruction

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CandyMan

Joined: 04 Sep 2009
Posts: 384
Location: film "CandyMan" directed through Bernard Rose OR Candy Shop

CandyMan 21 Mar 2018, 18:43

Code:

use16
org 0xFFF9
db 66h,72h,7Fh ;on Intel CPU this instruction jumps (jc) to 0x1007B, whether in AMD processors is it the same?

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21 Mar 2018, 18:43

DimonSoft

Joined: 03 Mar 2010
Posts: 1203
Location: Belarus

DimonSoft 21 Mar 2018, 19:37

CandyMan wrote:

Code:

use16
org 0xFFF9
db 66h,72h,7Fh ;on Intel CPU this instruction jumps (jc) to 0x1007B, whether in AMD processors is it the same?

From AMD SDM, although it might be just a part of the story. Why would you need to depend on such behaviour?

AMD SDM wrote:

If the jump is taken, the signed displacement is added to the rIP (of the following instruction) and the result is truncated to 16, 32, or 64 bits, depending on operand size.

21 Mar 2018, 19:37

CandyMan

Joined: 04 Sep 2009
Posts: 384
Location: film "CandyMan" directed through Bernard Rose OR Candy Shop

CandyMan 21 Mar 2018, 21:52

it is worthwhile reading documentation, thanks.

21 Mar 2018, 21:52

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